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HY62UF8200ASLM-55

Description
Standard SRAM, 256KX8, 55ns, CMOS, PBGA48, MICRO, CSP, BGA-48
Categorystorage    storage   
File Size183KB,12 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HY62UF8200ASLM-55 Overview

Standard SRAM, 256KX8, 55ns, CMOS, PBGA48, MICRO, CSP, BGA-48

HY62UF8200ASLM-55 Parametric

Parameter NameAttribute value
MakerSK Hynix
Parts packaging codeBGA
package instructionFBGA,
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time55 ns
JESD-30 codeR-PBGA-B48
JESD-609 codee1
memory density2097152 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals48
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX8
Package body materialPLASTIC/EPOXY
encapsulated codeFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, FINE PITCH
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.3 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Base Number Matches1
HY62UF8200A/ HY62QF8200A/ HY62EF8200A/
HY62SF8200A Series
256Kx8bit full CMOS SRAM
PRELIMINARY
DESCRIPTION
The
HY62UF8200A
/
HY62QF8200A
/
HY62EF8200A / HY62SF8200A is a high speed
and super low power 2Mbit full CMOS SRAM
organized as 262,144 words by 8 bits. The
HY62UF8200A / HY62QF8200A / HY62EF8200A
/ HY62SF8200A uses high performance full
CMOS process technology and is designed for
high speed and low power circuit technology. It is
particularly well-suited for the high density low
power system application. This device has a data
retention mode that guarantees data to remain
valid at a minimum power supply voltage of 1.5V.
FEATURES
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(LL/SL-part)
- 1.5V(min) data retention
Standard pin configuration
- 48ball CSP
Product
Voltage
Speed
Operation
Standby Current(uA)
No.
(V)
(ns)
Current(mA)
LL
SL
HY62UF8200A
3.0
55/70/85
10
10
2
HY62UF8200A-I
3.0
55/70/85
10
10
2
HY62QF8200A
2.5
70/85/100
5
10
2
HY62QF8200A-I
2.5
70/85/100
5
10
2
HY62EF8200A
2.0
85/100/120
5
10
2
HY62EF8200A-I
2.0
85/100/120
5
10
2
HY62SF8200A
1.8
100/120/150
5
10
2
HY62SF8200A-I
1.8
100/120/150
5
10
2
Note 1. E.T. : Extended Temperature, Normal : Normal Temperature
2. Current value is max.
Temperature
(°C)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
PIN CONNECTION
( Top View )
A0
ADD INPUT BUFFER
BLOCK DIAGRAM
SENSE AMP
ROW DECODER
COLUMN DECODER
I/O1
OUTPUT BUFFER
I/O8
A0
A1
CS2 A3
/WE A4
NC
A5
A6
A7
A8
IO1
IO2
Vcc
Vss
A17
IO5 A2
IO6
Vss
Vcc
IO7
NC
A17
IO3
IO8 /OE /CS1 A16 A15 IO4
A9
A10 A11 A12 A13 A14
CS2
/WE
/OE
PIN DESCRIPTION
Pin Name
/CS1
CS2
/WE
/OE
Pin Function
Chip Select 1
Chip Select 2
Write Enable
Output Enable
Pin Name
A0 ~ A17
I/O1 ~ I/O8
Vcc
Vss
Pin Function
Address Input
Data Input/Output
Power(3.0V, 2.5V, 2.0V or 1.8V)
Ground
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.01 /Feb. 99
Hyundai Semiconductor
CONTROL
LOGIC
/CS1
WRITE DRIVER
MEMORY ARRAY
2048x1024
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