DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
August 1986
Revised March 2000
DM74LS74A
Dual Positive-Edge-Triggered D Flip-Flops with
Preset, Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered D flip-flops with complementary outputs. The infor-
mation on the D input is accepted by the flip-flops on the
positive going edge of the clock pulse. The triggering
occurs at a voltage level and is not directly related to the
transition time of the rising edge of the clock. The data on
the D input may be changed while the clock is LOW or
HIGH without affecting the outputs as long as the data
setup and hold times are not violated. A low logic level on
the preset or clear inputs will set or reset the outputs
regardless of the logic levels of the other inputs.
Ordering Code:
Order Number
DM74LS74AM
DM74LS85ASJ
DM74LS74AN
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
PR
L
H
L
H
H
H
CLR
H
L
L
H
H
H
CLK
X
X
X
↑
↑
L
D
X
X
X
H
L
X
Q
H
L
H
L
Q
0
Outputs
Q
L
H
L
H
Q
0
H (Note 1) H (Note 1)
H
=
HIGH Logic Level
X
=
Either LOW or HIGH Logic Level
L
=
LOW Logic Level
↑ =
Positive-going Transition
Q
0
=
The output logic level of Q before the indicated input conditions were
established.
Note 1:
This configuration is nonstable; that is, it will not persist when either
the preset and/or clear inputs return to their inactive (HIGH) level.
© 2000 Fairchild Semiconductor Corporation
DS006373
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DM74LS74A
Absolute Maximum Ratings
(Note 2)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Clock Frequency (Note 4)
Pulse Width
(Note 3)
t
W
Pulse Width
(Note 4)
t
SU
t
SU
t
H
T
A
Setup Time (Note 3)(Note 5)
Setup Time (Note 4)(Note 5)
Hold Time (Note 5)(Note 6)
Free Air Operating Temperature
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
0
0
18
15
15
25
20
20
20↑
25↑
0↑
0
70
ns
ns
ns
°C
ns
ns
Parameter
Min
4.75
2
0.8
−0.4
8
25
20
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
Note 3:
C
L
=
15 pF, R
L
=
2 kΩ, T
A
=
25°C, and V
CC
=
5V.
Note 4:
C
L
=
50 pF, R
L
=
2 kΩ, T
A
=
25°C, and V
CC
=
5V.
Note 5:
The symbol (↑) indicates the rising edge of the clock pulse is used for reference.
Note 6:
T
A
=
25°C and V
CC
=
5V.
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DM74LS74A
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
Input Current @ Max
Input Voltage
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max
V
I
=
7V
Data
Clock
Preset
Clear
I
IH
HIGH Level
Input Current
V
CC
=
Max
V
I
=
2.7V
Data
Clock
Clear
Preset
I
IL
LOW Level
Input Current
V
CC
=
Max
V
I
=
0.4V
Data
Clock
Preset
Clear
I
OS
I
CC
Short Circuit Output Current
Supply Current
V
CC
=
Max (Note 8)
V
CC
=
Max (Note 9)
−20
4
2.7
3.4
0.35
0.25
0.5
0.4
0.1
0.1
0.2
0.2
20
20
40
40
−0.4
−0.4
−0.8
−0.8
−100
8
mA
mA
mA
µA
mA
Min
Typ
(Note 7)
Max
−1.5
Units
V
V
V
Note 7:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 8:
Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs,
where shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V
O
=
2.125V with the minimum
and maximum limits reduced by one half from their stated values. This is very useful when using automatic test equipment.
Note 9:
With all outputs OPEN, I
CC
is measured with CLOCK grounded after setting the Q and Q outputs HIGH in turn.
Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
From (Input)
Symbol
Parameter
To (Output)
C
L
=
15 pF
Min
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Clock to Q or Q
25
25
Max
R
L
=
2 kΩ
C
L
=
50 pF
Min
20
35
Max
MHz
ns
Units
Clock to Q or Q
Preset to Q
30
25
35
35
ns
ns
Preset to Q
30
35
ns
Clear to Q
Clear to Q
25
30
35
35
ns
ns
3
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DM74LS74A
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
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4
DM74LS74A
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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