DM9334 8-Bit Addressable Latch
August 1986
Revised February 2000
DM9334
8-Bit Addressable Latch
General Description
The DM9334 is a high speed 8-bit Addressable Latch
designed for general purpose storage applications in digital
systems. It is a multifunctional device capable of storing
single line data in eight addressable latches, and being a
one-of-eight decoder and demultiplexer with active level
HIGH outputs. The device also incorporates an active level
LOW common clear for resetting all latches, as well as an
active level LOW enable.
The DM9334 has four modes of operation which are shown
in the mode selection table. In the addressable latch mode,
data on the data line (D) is written into the addressed latch.
The addressed latch will follow the data input with all non-
addressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous state
and are unaffected by the data or address inputs.
In the one-of-eight decoding or demultiplexing mode, the
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs
are LOW and unaffected by the address and data inputs.
When operating the device as an addressable latch,
changing more than one bit of the address could impose a
transient wrong address. Therefore, this should only be
done while in the memory mode.
The function tables summarize the operation of the prod-
uct.
Features
s
Common clear
s
Easily expandable
s
Random (addressable) data entry
s
Serial to parallel capability
s
8 bits of storage/output of each bit available
s
Active high demultiplexing/decoding capability
Ordering Code:
Order Number
DM9334N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006609
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DM9334
Function Tables
E
L
H
L
H
C
H
H
L
L
Addressable Latch
Memory
Active HIGH Eight Channel Demultiplexer
Clear
Mode
Inputs
C
L
L
L
L
L
•
•
•
L
H
H
H
H
H
•
•
•
H
H
E
H
L
L
L
L
•
•
•
L
H
L
L
L
L
•
•
•
L
L
D
X
L
H
L
H
•
•
•
H
X
L
H
L
H
•
•
•
L
H
H
H
H
X
L
L
H
H
A0
X
L
L
H
H
A1
X
L
L
L
L
•
•
•
H
X
L
L
L
L
•
•
•
H
H
H
H
Q
N−1
Q
N−1
H
X
L
L
L
L
L
Q
N−1
L
H
Q
N−1
Q
N−1
L
A2
X
L
L
L
L
Q0
L
L
H
L
L
Q1
L
L
L
L
H
Present Output States
Mode
Q2
L
L
L
L
L
Q3
L
L
L
L
L
•
•
•
L
L
L
L
L
H
Memory
Q
N−1
Q
N−1
Q
N−1
Q
N−1
Q
N−1
L
H
Q
N−1
Q
N−1
•
•
•
Q
N−1
Q
N−1
L
H
Addressable
Latch
Q4
L
L
L
L
L
Q5
L
L
L
L
L
Q6
L
L
L
L
L
Q7
L
L
L
L
L
Demultiplex
Clear
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Don’t Care Condition
Q
N−1
=
Previous Output State
Logic Diagram
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2
DM9334
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0° to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
t
W
t
SU
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
ENABLE Pulse Width (Figure 1) (Note 3)
Setup Time
(Note 3)
Data 1 (Figure 5)
Data 0 (Figure 5)
Address (Figure 6)
(Note 2)
t
H
T
A
Hold Time
(Note 3)
Data 1 (Figure 5)
Data 0 (Figure 5)
0
0
0
−10
−13
70
ns
°C
19
20
20
10
13
13
14
5
ns
Parameter
Min
4.75
2
0.8
−0.8
16
Nom
5
Max
5.25
Units
V
V
V
mA
mA
ns
Free Air Operating Temperature
Note 2:
The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is
addressed without affecting the other latches.
Note 3:
T
A
=
25°C and V
CC
=
5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
Conditions
V
CC
=
Min, I
I
= −12
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IH
=
Min, V
IL
=
Max
V
CC
=
Max
V
I
=
2.4V
V
CC
=
Max
V
I
=
0.4V
V
CC
=
Max (Note 5)
V
CC
=
Max
2.4
3.6
0.2
0.4
1
E Input
Others
E Input
Others
−30
56
60
40
−2.4
−1.6
−100
86
Min
Typ
(Note 4)
Max
−1.5
Units
V
V
V
mA
µA
mA
mA
mA
Input Current @ Max Input Voltage V
CC
=
Max, V
I
=
5.5V
HIGH Level
Input Current
LOW Level
Input Current
Short Circuit Output Current
Supply Current
Note 4:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 5:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
3
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DM9334
Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
From (Input)
To (Output)
Enable to Output,
(Figure 1)
Enable to Output,
(Figure 1)
Data to Output,
(Figure 4)
Data to Output,
(Figure 4)
Address to Output,
(Figure 2)
Address to Output,
(Figure 2)
Clear to Output,
(Figure 3)
R
L
=
400Ω, C
L
=
15 pF
Min
Max
28
27
35
28
35
35
31
Units
ns
ns
ns
ns
ns
ns
ns
Switching Time Waveforms
Other Conditions: C
=
H, A
=
Stable
Other Conditions: E
=
L, C
=
L, D
=
H
FIGURE 1.
FIGURE 2.
Other Conditions: E
=
H
Other Conditions: E
=
L, C
=
H, A
=
Stable
FIGURE 3.
FIGURE 4.
Other Conditions: C
=
H
Other Conditions: C
=
H, A
=
Stable
Note:
The shaded areas indicate when the inputs are permitted to change
for predictable output performance.
FIGURE 5.
FIGURE 6.
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DM9334 8-Bit Addressable Latch
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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