DM96S02 Dual Retriggerable Resettable Monostable Multivibrator
January 1992
Revised June 1999
DM96S02
Dual Retriggerable Resettable Monostable Multivibrator
General Description
The DM96S02 is a dual retriggerable and resettable
monostable multivibrator. This one-shot provides excep-
tionally wide delay range, pulse width stability, predictable
accuracy and immunity to noise. The pulse width is set by
an external resistor and capacitor. Resistor values up to 2.0
MΩ for the DM96S02 reduce required capacitor values.
Hysteresis is provided on the positive trigger input of the
DM96S02 for increased noise immunity.
Order Code:
Order Number
DM96S02M
DM96S02N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
V
CC
=
Pin 16
GND
=
Pin 8
Pin Descriptions
Pin Names
I0
I1
C
D
Q1 - 2
Q1 - 2
C
X1, 2
R
X1,2
Description
Trigger Input (Active Falling Edge)
Schmitt Trigger Input (Active Rising-Edge)
Direct Clear Input (Active-LOW)
True Pulse Output
Complementary Pulse Output
External Capacitor Connection
External Resistor Connection
Triggering Truth Table
Pin Number
5(11)
H
→
L
H
X
4(12)
L
L
→
H
X
3(13)
H
H
L
Operation
Trigger
Trigger
Reset
H
=
HIGH Voltage Level
≥
V
IH
L
=
LOW Voltage Level
≤
V
IL
X
=
Immaterial (either H or L)
H
→
L
=
HIGH-to-LOW Voltage Level transition
L
→
H
=
LOW-to-HIGH Voltage Level transition
© 1999 Fairchild Semiconductor Corporation
DS009810.prf
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DM96S02
Functional Description
The 96S02 dual retriggerable resettable monostable multi-
vibrator has tow DC coupled trigger inputs per function,
one active LOW (I0) and one active HIGH (I1). The I1 input
utilizes an internal Schmitt trigger with hysteresis of 0.3V to
provide increased noise immunity. The use of active HIGH
and LOW inputs allows wither rising or falling edge trigger-
ing and optional non-retriggerable operation. The inputs
are DC coupled making triggering independent of input
transition times. When input conditions for triggering are
met the Q output goes HIGH and the external capacitor is
rapidly discharged and then allowed to recharge. An input
trigger which occurs during the timing cycle will retrigger
the circuit and result in Q remaining HIGH. The output
pulse may be terminated (Q to the LOW state) at any time
by setting the Direct Clear input LOW. Retriggering may be
inhibited by tying the Q output to I0 or the Q output to I1.
Differential sensing techniques are used to obtain excellent
stability over temperature and power supply variations and
a feedback Darlington capacitor discharge circuit mini-
mizes pulse width variation from unit to unit. Schottky TTL
output stages provide high switching speeds and output
compatibility with all TTL logic families.
Block Diagram
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2
DM96S02
Operation Notes
TIMING
1. An external resistor (R
X
) and an external capacitor (C
X
)
are required as shown in the Logic Diagram. The value
of R
X
may vary from 1.0 kΩ to 2.0 MΩ (DM96S02).
2. The value of C
X
may vary from 0 to any necessary
value available. If however, the capacitor has signifi-
cant leakage relative to V
CC
/R
X
the timing equations
may not represent the pulse width obtained.
3. Polarized capacitors may be used directly. The (+) ter-
minal of a polarized capacitor is connected to pin 1(15),
the (−) terminal to pin 2(14) and R
X
. Pin 1(15) will
remain positive with respect to pin 2(14) during the tim-
ing cycle. However, during quiescent (non-triggered)
conditions, pin 1(15) may go negative with respect to
pin 2(14) depending on values of R
X
and V
CC
. for val-
ues of R
X
≥
10 kΩ the maximum amount of capacitor
reverse polarity, pin 1(15) negative with respect to pin
2(14) is 500 mV. Most tantalum electrolytic capacitors
are rated for safe reverse bias operation up to 5% of
their working forward voltage rating; therefore, capaci-
tors having a rating of 10 WVdc or higher should be
used with the DM96S02 when R
X
≥
10 kΩ.
4. The output pulse width t
W
for R
X
≥
10 kΩ and C
X
≥
1000 pF is determined as follows:
t
W
=
0.55 R
X
C
X
Where R
X
is in kΩ, C
X
is in pF, t is in ns
or
RT
X
is in kΩ,
CX is in
µF,
t is in ms.
5. The output pulse width for R
X
<
10 kΩ or C
X
<
1000 pF
should be determined from pulse width versus C
X
or
R
X
graphs.
6. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
7. Under any operating condition, C
X
and R
X
(Min) must
be kept as close to the circuit as possible to minimize
stray capacitance and reduce noise pickup.
8. V
CC
and ground wiring should conform to good high
frequency standards so that switching transients on
V
CC
and ground leads do not cause interaction
between one shots. Use of a 0.01
µF
to 0.1µF bypass
capacitor between V
CC
and ground located near the
circuit is recommended.
TRIGGERING
1. The minimum negative pulse width into I0 is 8.0 ns; the
minimum positive pulse width into I1 is 12 ns.
2. Input signals to the DM96S02 exhibiting slow or noisy
transitions should use the positive trigger input I1 which
contains a Schmitt trigger.
3. When non-retriggerable operation is required, i.e.,
when input triggers are to be ignored during quasi-sta-
ble state, input latching is used to inhibit retriggering.
4. An overriding active LOW level direct clear is provided
on each multivibrator. By applying a LOW to the clear,
any timing cycle can be terminated or any new cycle
inhibited until the LOW reset input is removed. Trigger
inputs will not produce spikes in the output when the
reset is held LOW. A LOW-to-HIGH transition on C
D
will not trigger the DM96S02. If the C
D
input goes HIGH
coincident with a trigger transition, the circuit will
respond to the trigger.
3
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DM96S02
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
V
T+
V
T−
V
CX
Parameter
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
Positive-Going Threshold
Voltage, I
0
, I
1
Negative-Going
Threshold Voltage, I
0
, I
1
Capacitor Voltage
Pin 1 (15) Referenced
to Pin 2 (14)
V
CC
=
5.0V
V
CC
=
5.0V
V
CC
=
4.75V
to 5.25V
R
X
=
1.0 kΩ,
R
X
≥
10 kΩ
R
X
>
1.0 MΩ
0.8
−0.85
−0.5
−0.4
3.0
3.0
3.0
V
0
Conditions
Min
4.75
2
0.8
−1
20
70
2.0
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
V
V
DC Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
Input Current at Max
Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit
Output Current
Supply Current
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.4V
V
CC
=
Max
(Note 2)
V
CC
=
Max
−40
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
= −1.0
mA,
V
IL
=
Max
V
CC
=
Min, I
OL
=
Max,
V
IH
=
Min
V
CC
=
Max, V
I
=
5.5V
2.7
3.4
0.35
0.5
1
20
−1.0
−100
75
Min
Typ
Max
−1.2
Units
V
V
V
mA
µA
mA
mA
mA
Note 2:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
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4
DM96S02
AC Electrical Characteristics
V
CC
= +
5.0, T
A
= +25°C
(See Section for Waveforms and Load Configurations)
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PLH
t
W
(L)
t
W
(H)
t
W
(L)
t
W
(H)
t
W
R
X
t∆
t
t∆
t
Parameter
Propagation Delay
I0 to Q
Propagation Delay
I0 to Q
Propagation Delay
I1 to Q
Propagation Delay
I1 to Q
Propagation Delay
C
D
to Q
Propagation Delay
C
D
to Q
I0 Pulse Width LOW
I1 Pulse Width HIGH
C
D
Pulse Width LOW
Minimum Q Pulse Width HIGH
Q Pulse Width
Timing Resistor Range (Note 3)
Change in Q Pulse Width
over Temperature
Change in Q Pulse Width
over V
CC
Range
T
A
=
25°C, V
CC
=
4.75V to
5.25V, R
X
=
10 kΩ,
C
X
=
1000 pF
T
A
=
25°C, V
CC
=
4.5 to
5.5V, R
X
=
10 kΩ,
C
X
=
1000 pF
Note 3:
Applies only over V
CC
and T
X
range for DM96S02.
Note 4:
All Typicals are at V
CC
=
5V, T
A
=
25°C
Conditions
Min
C
L
=
16 pF
Max
15
Units
ns
19
19
20
Figure 1
20
ns
ns
ns
ns
14
8.0
12
7.0
R
X
=
1.0 kΩ, C
X
=
10 pF
Including Jig and Stray
R
X
=
10 kΩ, C
X
=
1000 pF
T
A
= −55°C
to
+
125°C
V
CC
=
4.5V to 5.5V
R
X
=
10 kΩ, CX
=
1000 pF
30
5.2
1.0
45
5.8
2000
1.0
ns
ns
ns
ns
ns
µs
kΩ
%
1.0
%
Switching Waveforms
FIGURE 1.
5
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