AK6480BH datasheet, PDF - EEWORLD Datasheet

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AK6480BH: Description2K / 4K / 8kbit serial cmos eeprom; Categorystorage storage; File Size140KB，15 Pages; ManufacturerAKM [Asahi Kasei Microsystems]

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AK6480BH Overview

2K / 4K / 8kbit serial cmos eeprom

AK6480BH Parametric

Parameter Name	Attribute value
Parts packaging code	MSOP
package instruction	LSSOP,
Contacts	8
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	DATA RETENTION = 10 YEARS
Maximum clock frequency (fCLK)	2 MHz
Data retention time - minimum	10
JESD-30 code	R-PDSO-G8
length	2.9 mm
memory density	8192 bit
Memory IC Type	EEPROM
memory width	16
Number of functions	1
Number of terminals	8
word count	512 words
character code	512
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512X16
Package body material	PLASTIC/EPOXY
encapsulated code	LSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Parallel/Serial	SERIAL
Certification status	Not Qualified
Maximum seat height	1.4 mm
Serial bus type	3-WIRE
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.8 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	2.8 mm
Maximum write cycle time (tWC)	10 ms
Base Number Matches	1

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ASAHI KASEI

[AK6420B/40B/80B]

AK6420B / 40B / 80B

2K / 4K / 8Kbit Serial CMOS EEPROM

Features

ADVANCED CMOS EEPROM TECHNOLOGY

Wide Vcc (1.8V

∼

5.5V) operation

AK6420B

• •

2048 bits: 128

16 organization

AK6440B

• •

4096 bits: 256

16 organization

AK6480B

• •

8192 bits: 512

16 organization

ONE CHIP MICROCOMPUTER INTERFACE

- Interface with one chip microcomputer's serial communication port directly

LOW POWER CONSUMPTION

- 0.8

A Max (Standby mode)

HIGH RELIABILITY

-Endurance

-Data Retention

: 100K cycles

: 10 years

SPECIAL FEATURES

- High speed operation ( f

MAX

=1MHz: Vcc=2.5V )

- Automatic write cycle time-out with auto-ERASE

- Automatic address increment (READ)

- Software and Hardware controlled write protection

IDEAL FOR LOW DENSITY DATA STORAGE

- Low cost, space saving, 8-pin package (MSOP)

DAS03E-00

-1-

1999/05

ASAHI KASEI

[AK6420B/40B/80B]

General Description

The AK6420B/40B/80B is a 2048/4096/8192bit, serial, read/write, non-volatile memory device fabricated using

an advanced CMOS E2PROM technology. The AK6420B has 2048bits of memory organized into 128

registers of 16 bits each. The AK6440B has 4096bits of memory organized into 256 registers of 16 bits each.

The AK6480B has 8192bits of memory organized into 512 registers of 16 bits each. The AK6420B/40B/80B

can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is

integrated for high voltage generation that is used for write operation.

The AK6420B/40B/80B can connect to the serial communication port of popular one chip microcomputer

directly (3 line negative clock synchronous interface). At write operation, AK6420B/40B/80B takes in the write

data from data input pin (DI) to a register synchronously with rising edge of input pulse of serial clock pin

(SK). And at read operation, AK6420B/40B/80B takes out the read data from a register to data output pin

(DO) synchronously with falling edge of SK.

The AK6420B/40B/80B has 4 instructions such as READ, WRITE, WREN (write enable) and WRDS (write

disable). Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits

2).

When input level of SK pin is high level and input level of chip select (CS) pin is changed from high level to low

level, AK6420B/40B/80B can receive the instructions.

Special features of the AK6420B/40B/80B include : automatic write time-out with auto-ERASE, Ready/Busy

status signal output and ultra-low standby power mode when deselected (CS=high).

•

Software and Hardware controlled write protection

The AK6420B/40B/80B has 2 (hardware and software) write protection functions.

After power on or after execution of WRDS (write disable) instruction, execution of WRITE instruction will be

disabled. This write protection condition continues until WREN instruction is executed or Vcc is removed from

the part.

Execution of READ instruction is independent of both WREN and WRDS instructions.

Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the

WRITE instruction is not executed.

•

Ready/Busy status signal

The DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is

changed from high level to low level, the AK6420B/40B/80B is in the status output mode and the DO pin

indicates the Ready/Busy status. The Ready/ Busy status outputs on DO pin until CS pin is changed from low

level to high level, or first bit ("1") of op-code of next instruction is given to the part. Except when the device is

in the status output mode or outputs data, the DO pin is in the high impedance state.

Type of Products

Model

AK6420BH

AK6440BH

AK6480BH

Memory size

2Kbits

4Kbits

8Kbits

Temp.Range

-40°C∼85°C

Vcc

1.8V∼5.5V

Package

8pin Plastic MSOP

DAS03E-00

-2-

1999/05

ASAHI KASEI

Pin Description

[AK6420B/40B/80B]

(Chip Select)

When SK is high level and CS is changed from high level to low level, AK6420B/40B/80B can receive the

instructions. CS should be kept low level while receiving op-code, address and data and while outputting data.

If CS is changed to high level during the above period, AK6420B/40B/80B stops the instruction execution.

When SK is low and CS is changed from high level to low level, AK6420B/40B/80B will be in status output

mode. The CS need not be low level during the automatic write time-out period (BUSY status).

(Serial Clock)

The SK clock pin is the synchronous clock input for input/output data. At write operation, AK6420B/40B/80B

takes in the write data from data input pin (DI) synchronously with rising edge of input pulse of serial clock pin

(SK). And at read operation, AK6420B/40B/80B takes out the read data to data output pin (DO)

synchronously with falling edge of SK. The SK clock is not needed during the automatic write time-out period

(BUSY status), the status output period and when the device isn't selected (CS = high level).

(Data Input)

The op-code, address and write data is input to the DI pin.

(Data Output)

The DO pin outputs the read data and status signal and will be high impedance except for this timing.

RESET

(Reset)

The AK6420B/40B/80B stops executing the write instruction when the RESET pin is high level. The RESET

pin should be low level while the write instruction input period and the automatic write time-out period. If the

RESET pin is high level while the automatic write time-out period, the AK6420B/40B/80B stops execution of

internal programming and the device returns to ready status. In this case the word data of the specified

address will be incomplete. When inputting the new instruction after RESET, the CS pin should be set to high

level. The read, write enable and write disable instructions are not affected by RESET pin status.

Vcc

(Power Supply)

GND

(Ground)

DAS03E-00

-4-

1999/05

AK6480BH Related Products

	AK6480BH	AK6420B	AK6480B	AK6440B	AK6420BH	AK6440BH
Description	2K / 4K / 8kbit serial cmos eeprom	2K / 4K / 8kbit serial cmos eeprom	2K / 4K / 8kbit serial cmos eeprom	2K / 4K / 8kbit serial cmos eeprom	2K / 4K / 8kbit serial cmos eeprom	2K / 4K / 8kbit serial cmos eeprom

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