IN74ACT153
D
UAL
4-I
NPUT
D
ATA
S
ELECTOR
/M
ULTIPLEXER
High-Speed Silicon-Gate CMOS
The IN74ACT153 is identical in pinout to the LS/ALS153,
HC/HCT153. The IN74ACT153 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS
inputs.
The Address Inputs select one of four Data Inputs from each
multiplexer. Each multiplexer has an active-low Strobe control
and a noninverting output.
•
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
µA;
0.1
µA
@ 25°C
Outputs Source/Sink 24 mA
•
•
•
•
ORDERING INFORMATION
IN74ACT153N Plastic
IN74ACT153D SOIC
T
A
= -40° to 85° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Output
A1 A0 Strobe
Y
X
X
H
L
L
L
L
D0
L
H
L
D1
H
L
L
D2
H
H
L
D3
D0,D1...D3=the
level
of
the
respective Data Input
X = don’t care
PIN 16 =V
CC
PIN 8 = GND
1
IN74ACT153
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
mA
±20
I
OUT
DC Output Sink/Source Current, per Pin
mA
±50
I
CC
DC Supply Current, V
CC
and GND Pins
mA
±50
P
D
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
T
L
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
J
Junction Temperature (PDIP)
T
A
Operating Temperature, All Package Types
I
OH
Output Current - High
I
OL
Output Current - Low
t
r
, t
f
Input Rise and Fall Time
*
V
CC
=4.5 V
V
CC
=5.5 V
(except Schmitt Inputs)
*
V
IN
from 0.8 V to 2.0 V
Min
4.5
0
Max
5.5
V
CC
140
+85
-24
24
10
8.0
Unit
V
V
°C
°C
mA
mA
ns/V
-40
0
0
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
IN74ACT153
DC ELECTRICAL CHARACTERISTICS(Voltages
Referenced to GND)
Guaranteed
V
CC
Limits
Symbol
Parameter
Test Conditions
V
25
°C
-40°C to
85°C
V
IH
Minimum
High- V
OUT
=0.1 V or V
CC
-0.1 V 4.5
2.0
2.0
Level
Input
5.5
2.0
2.0
Voltage
V
IL
Maximum Low - V
OUT
=0.1 V or V
CC
-0.1 V 4.5
0.8
0.8
Level
Input
5.5
0.8
0.8
Voltage
V
OH
Minimum
High- I
OUT
≤
-50
µA
4.5
4.4
4.4
Level
Output
5.5
5.4
5.4
Voltage
*
V
IN
=
V
IL
or
V
IH
3.76
3.86
I
OH
=-24
mA 4.5
4.76
4.86
5.5
I
OH
=-24 mA
V
OL
Maximum
Low- I
OUT
≤
50
µA
4.5
0.1
0.1
Level
Output
5.5
0.1
0.1
Voltage
*
V
IN
=
V
IL
or
V
IH
0.44
0.36
I
OL
=24
mA 4.5
0.44
0.36
5.5
I
OL
=24 mA
I
IN
Maximum Input V
IN
=V
CC
or GND
5.5
±0.1
±1.0
Leakage Current
5.5
1.5
Additional
Max V
IN
=V
CC
- 2.1 V
∆I
CCT
I
CC
/Input
V
OLD
=1.65 V Max
I
OLD
+Minimum
5.5
75
Dynamic Output
Current
V
OHD
=3.85 V Min
I
OHD
+Minimum
5.5
-75
Dynamic Output
Current
V
IN
=V
CC
or GND
I
CC
Maximum
5.5
8.0
80
Quiescent Supply
Current
(per Package)
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Unit
V
V
V
V
µA
mA
mA
mA
µA
3
IN74ACT153
AC ELECTRICAL CHARACTERISTICS(V
CC
=5.0 V
±
10%, C
L
=50pF,Input t
r
=t
f
=3.0 ns)
Guaranteed Limits
Unit
Symbol
Parameter
25
°C
-40°C to
85°C
Min Max Min Max
t
PLH
Propagation Delay, Input A to Output Y 3.0 11.5 2.0 13.5
ns
(Figure 2)
t
PHL
Propagation Delay, Input A to Output Y 3.0 11.5 2.5 13.5
ns
(Figure 2)
t
PLH
Propagation Delay, Strobe to Output Y 2.0 10.5 2.0 12.5
ns
(Figure 3)
t
PHL
Propagation Delay, Strobe to Output Y 3.0
9.5
2.5 11.0
ns
(Figure 3)
t
PLH
Propagation Delay, Input D to Output Y 2.5
9.5
2.0 11.0
ns
(Figure 1)
t
PHL
Propagation Delay, Input D to Output Y 2.0
9.5
2.0 11.0
ns
(Figure 1)
C
IN
Maximum Input Capacitance
4.5
4.5
pF
Typical @25°C,V
CC
=5.0
V
65
C
PD
Power Dissipation Capacitance
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
4
IN74ACT153
EXPANDED LOGIC DIAGRAM
5
NXP MCU
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