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IW4093BD

Description
quad 2-input nand schmitt triggers high-voltage silicon-gate cmos
File Size134KB,5 Pages
ManufacturerIK Semicon
Websitehttp://www.iksemi.com/en/index.html
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IW4093BD Overview

quad 2-input nand schmitt triggers high-voltage silicon-gate cmos

TECHNICAL DATA
IW4093B
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
The IW4093B consists of four Schmitt-trigger circuits. Each circuit
functions as a two-input NAND gate with Schmitt-trigger action on
both inputs. The gate switches at different points for positive- and
negative- going signals. The difference between the positive voltage
(V
P
) and the negative voltage (V
N
) is defined as hysteresis voltage (V
H
)
(see Fig.1).
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4093BN Plastic
IW4093BD SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
A
L
PIN 14 =V
CC
PIN 7 = GND
L
H
H
B
L
H
L
H
Output
Y
H
H
H
L
142

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IW4093BD IW4093B IW4093BN
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