IN74HC132A
Q
UAD
2-I
NPUT
NAND G
ATE
WITH
S
CHMITT
-T
RIGGER
I
NPUTS
High-Performance Silicon-Gate CMOS
The IN74HC132A is identical in pinout to the LS/ALS132. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
The IN74HC132A can be used to enhance noise immunity or to
square up slowly changing waveforms.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
µA
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC132AN Plastic
IN74HC132AD SOIC
T
A
= -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
•
•
•
•
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
PIN 14 =V
CC
PIN 7 = GND
1
IN74HC132A
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
mA
±20
I
OUT
DC Output Current, per Pin
mA
±25
I
CC
DC Supply Current, V
CC
and GND Pins
mA
±50
P
D
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
T
L
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
A
Operating Temperature, All Package Types
t
r
, t
f
Input Rise and Fall Time (Figure 1)
*
Min
2.0
0
-55
-
Max
6.0
V
CC
+125
no
limit
*
Unit
V
V
°C
ns
When V
IN
≈
0.5V
CC
, I
CC
> > quiescent current.
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
IN74HC132A
AC ELECTRICAL CHARACTERISTICS(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Guaranteed Limit
V
CC
Symbol
Parameter
V
25
°C ≤85°C ≤125
to
°C
-55°C
190
155
125
t
PLH
,
Maximum Propagation Delay, Input A or 2.0
38
31
25
t
PHL
B to Output Y (Figures 1 and 2)
4.5
32
26
21
6.0
110
95
75
t
TLH
, t
THL
Maximum Output Transition Time, Any 2.0
22
19
15
4.5
Output
19
16
13
6.0
(Figures 1 and 2)
C
IN
Maximum Input Capacitance
-
10
10
10
Power Dissipation Capacitance (Per
Gate)
Used to determine the no-load dynamic
power
consumption:
2
P
D
=C
PD
V
CC
f+I
CC
V
CC
Typical @25°C,V
CC
=5.0 V
24
pF
Unit
ns
ns
pF
C
PD
*
Includes all probe and jig capacitance.
Figure 2. Test Circuit
Figure 1. Switching Waveforms
4
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