IN74HC161A
P
RESETTABLE
C
OUNTERS
High-Performance Silicon-Gate CMOS
The IN74HC161A is identical in pinout to the LS/ALS161. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
The IN74HC161A is programmable 4-bit synchronous counter
that feature parallel Load, asynchronous Reset, a Carry Output
for cascading and count-enable controls.
The IN74HC161A is binary counter with asynchronous Reset.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
µA
High Noise Immunity Characteristic of CMOS Devices
•
•
•
•
ORDERING INFORMATION
IN74HC161AN Plastic
IN74HC161AD SOIC
T
A
= -55° to 125° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
FUNCTION TABLE
Rese
t
L
H
H
H
H
H
Load
X
L
H
H
H
X
Inputs
Enable Enable
P
T
X
X
X
X
X
L
L
X
H
H
X
X
Clock
X
Q0
L
P0
Outputs
Q1 Q2
L
L
P1
P2
No change
No change
Count up
No change
Q3
L
P3
Function
Reset to “0”
Preset Data
No count
No count
Count
No count
X=don’t care
P0,P1,P2,P3 = logic level of Data inputs
Ripple Carry Out = Enable T
•
Q0
•
Q1
•
Q2
•
Q3
1
IN74HC161A
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
mA
±20
I
OUT
DC Output Current, per Pin
mA
±25
I
CC
DC Supply Current, V
CC
and GND Pins
mA
±50
P
D
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
T
L
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
A
Operating Temperature, All Package Types
t
r
, t
f
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
Min
2.0
0
-55
0
0
0
Max
6.0
V
CC
+125
1000
500
400
Unit
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
IN74HC161A
DC ELECTRICAL CHARACTERISTICS(Voltages
Referenced to GND)
Guaranteed Limit
V
CC
Symbol Parameter
Test Conditions
V
≤85
≤125
25
°C
to
°C
°C
-55°C
1.5
1.5
V
OUT
=0.1 V or V
CC
-0.1 V 2.0
1.5
V
IH
Minimum High-
3.15
3.15
3.15
Level Input
4.5
I
OUT
≤
20
µA
4.2
4.2
4.2
Voltage
6.0
0.5
0.5
V
OUT
=0.1 V or V
CC
-0.1 V 2.0
0.5
V
IL
Maximum Low -
1.35
1.35
1.35
Level Input
4.5
I
OUT
≤
20
µA
1.8
1.8
1.8
Voltage
6.0
1.9
1.9
V
IN
=V
IH
or V
IL
1.9
V
OH
Minimum High-
2.0
4.4
4.4
4.4
Level Output
4.5
I
OUT
≤
20
µA
5.9
5.9
5.9
Voltage
6.0
V
IN
=V
IH
or V
IL
3.7
3.84
3.98
4.5
I
OUT
≤
6.0 mA
5.2
5.34
5.48
6.0
I
OUT
≤
7.8 mA
0.1
0.1
V
IN
=V
IH
or V
IL
0.1
V
OL
Maximum Low-
2.0
0.1
0.1
0.1
Level Output
4.5
I
OUT
≤
20
µA
0.1
0.1
0.1
Voltage
6.0
V
IN
=V
IH
or V
IL
0.4
0.33
0.26
4.5
I
OUT
≤
6.0 mA
0.4
0.33
0.26
6.0
I
OUT
≤
7.8 mA
I
IN
Maximum Input
V
IN
=V
CC
or GND
6.0
±0.1
±1.0
±1.0
Leakage Current
V
IN
=V
CC
or GND
I
CC
Maximum
6.0
4.0
40
160
Quiescent Supply I
OUT
=0µA
Current
(per Package)
Unit
V
V
V
V
µA
µA
3
IN74HC161A
AC ELECTRICAL CHARACTERISTICS(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Guaranteed Limit
V
CC
Symbol
Parameter
V
25
°C ≤85°C ≤125
to
°C
-55°C
4
5
6
f
max
Maximum Clock Frequency (Figures 1,6) 2.0
20
24
30
4.5
24
28
35
6.0
200
160
120
2.0
t
PLH
28
23
20
4.5
22
20
16
6.0
Maximum Propagation Delay Clock to Q
320
185
145
t
PHL
(Figures 1,6)
2.0
30
25
22
4.5
23
20
18
6.0
220
185
145
t
PHL
Maximum Propagation Delay Reset to Q 2.0
25
22
20
(Figures 2 and 6)
4.5
21
19
17
6.0
190
150
110
2.0
t
PLH
20
18
16
4.5
17
15
14
Maximum Propagation Delay Enable T to 6.0
Ripple Carry Out
210
175
135
t
PHL
(Figures 3,6)
2.0
22
20
18
4.5
20
16
15
6.0
200
160
120
2.0
t
PLH
30
27
22
4.5
25
22
18
Maximum Propagation Delay Clock to 6.0
Ripple
220
185
145
t
PHL
Carry Out (Figures 1,6)
2.0
35
28
22
4.5
28
24
20
6.0
230
190
155
t
PHL
Maximum Propagation Delay Reset to 2.0
30
26
22
Ripple Carry Out (Figures 2,6)
4.5
25
22
18
6.0
110
95
75
t
TLH
, t
THL
Maximum Output Transition Time, Any 2.0
22
19
15
4.5
Output
19
16
13
6.0
(Figures 1 and 6)
C
IN
Maximum Input Capacitance
-
10
10
10
Power Dissipation Capacitance (Per
Gate)
Used to determine the no-load dynamic
power
consumption:
2
P
D
=C
PD
V
CC
f+I
CC
V
CC
Typical @25°C,V
CC
=5.0 V
30
pF
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
C
PD
4
IN74HC161A
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
V
CC
V
Guaranteed Limit
25
°C ≤85°C ≤125°
C
to
-55°C
80
60
40
30
20
15
20
18
12
90
75
60
30
20
15
20
18
12
110
95
80
35
25
20
25
23
17
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
110
95
80
26
20
15
23
17
12
110
95
80
26
20
15
23
17
12
90
75
60
18
15
12
15
13
10
90
75
60
18
15
12
15
13
10
1000
1000
1000
500
500
500
400
400
400
Unit
t
SU
t
SU
t
SU
t
h
t
h
t
rec
t
rec
t
w
t
w
t
r,
t
f
Minimum Setup Time, Preset Data Inputs
to Clock (Figure 4)
Minimum Setup Time, Load to Clock
(Figure 4)
Minimum Setup Time, Enable T or
Enable P to Clock (Figure 5)
Minimum Hold Time, Clock to Load or
Preset Data Inputs (Figure 4)
Minimum Hold Time, Clock to Enable T
or Enable P (Figure 5)
Minimum Recovery Time, Reset Inactive
to Clock (Figure 2)
Minimum Recovery Time, Load Inactive
to Clock (Figure 4)
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Reset (Figure 2)
Maximum Input Rise and Fall Times
(Figure 1)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
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