TECHNICAL DATA
IW4042B
Quad Clocked «D» Latch
High-Voltage Silicon-Gate CMOS
IW4042B types contain four latch circuits, each strobed by a common
clock. Complementary buffered outputs are available from each circuit.
The impedance of the n- and p-channel output devices is balanced and all
outputs are electrically identical. Information present at the data input is
transferred to outputs Q and Q during the CLOCK level which is
programmed by the POLARITY input. For POLARITY = 0 the transfer
occurs during the 0 CLOCK level and for POLARITY = 1 the transfer
occurs during the 1 CLOCK level. The outputs follow the data input
providing the CLOCK and POLARITY levels defined above are present.
When a CLOCK transition occurs (positive for POLARITY = 0 and
negative for POLARTY = 1) the information present at the input during
the CLOCK transition is retained at the outputs until an opposite CLOCK
transition occurs.
The IW4042B types are supplied in 16-lead hermetic dual-in-line
ceramic packages (D and F suffixes); 16-lead dual-in-line plastic package
(E suffix), and in chip form (H suffix).
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4042BN Plastic
IW4042BD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Clock
0
1
1
0
PIN 16 =V
CC
PIN 8 = GND
Polarity
0
0
1
1
Outputs
Q
D
Latch
D
Latch
Rev. 00
IW4042B
MAXIMUM RATINGS
*
Symbol
V
CC
V
I
V
OUT
I
I
P
D
Ptot
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±10
750
500
100
-65 to +150
260
Unit
V
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
, V
OUT
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤
VCC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
VCC
). Unused
outputs must be left open.
Rev. 00
IW4042B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
СС
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-Level
Output Voltage
Maximum Low-Level
Output Voltage
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output
Low (Sink) Current
Test Conditions
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
IN
=GND or V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
Guaranteed Limit
≥-55°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
1
2
4
20
0.64
1.6
4.2
-2.0
-0.64
-1.6
-4.2
25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
1
2
4
20
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±1.0
30
60
120
600
0.36
0.9
2.4
mA
-1.15
-0.36
-0.9
-2.4
Unit
V
V
IL
V
V
OH
V
V
OL
V
IN
=GND or V
CC
V
I
IN
I
СС
V
IN
= GND or V
CC
V
IN
= GND or V
CC
μA
μA
I
OL
V
IN
= GND or V
CC
V
OL
=0.4 V
V
OL
=0.5 V
V
OL
=1.5 V
mA
I
OH
Minimum Output
V
IN
= GND or V
CC
High (Source) Current V
OH
=2.5 V
V
OH
=4.6 V
V
OH
=9.5 V
V
OH
=13.5 V
Rev. 00
IW4042B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200 kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
PLH
, t
PHL
Parameter
Maximum Propagation Delay, Clock to Q
(Figure 1)
Maximum Propagation Delay, Clock to Q
(Figure 1)
Maximum Propagation Delay, Data to Q
(Figure 2)
Maximum Propagation Delay, Data to Q
(Figure 2)
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Input Capacitance
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
-
450
200
160
500
230
180
220
110
80
300
150
100
200
100
80
Guaranteed Limit
≥-55°C
25°C
450
200
160
500
230
180
220
110
80
300
150
100
200
100
80
7.5
≤125°C
900
400
320
1000
460
360
440
220
160
600
300
200
400
200
160
Unit
ns
t
PLH
, t
PHL
ns
t
PLH
, t
PHL
ns
t
PLH
, t
PHL
ns
t
TLH
, t
THL
ns
C
IN
pF
TIMING REQUIREMENTS
(C
L
=50pF, R
L
=200 kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
w
Parameter
Minimum Pulse Width, Clock (Figure 1)
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
200
100
60
50
30
25
120
60
50
Guaranteed Limit
≥-55°C
25°C
200
100
60
50
30
25
120
60
50
Not rise or fall
time sensitive
≤125°C
400
200
120
100
60
50
240
120
100
Unit
ns
t
su
Minimum Setup Time, Data to Clock
(Figure 1)
Minimum Hold Time, Clock to Data
(Figure 1)
Maximum Input Rise or Fall Time, Clock
(Figure 1)
ns
t
h
ns
t
r
, t
f
μs
Rev. 00
IW4042B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Rev. 00
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