TECHNICAL DATA
IW4029B
Presettable Up/Down Counter
High-Voltage Silicon-Gate CMOS
The IW4029B consists of a four-stage binary or BCD-decade up/down
counter with provisions for look-ahead carry in both counting modes. The
inputs consists of a single CLOCK, CARRY IN,(CLOCK ENABLE),
BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual
JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as
outputs.
A high PRESET ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state asynchronously with the clock.
ORDERING INFORMATION
A low on each JAM line, when the PRESET-ENABLE signal is high,
IW4029BN Plastic
resets the counter to its zero count. The counter is advanced one count at
IW4029BD SOIC
the positive transition of the clock when the CARRY IN and PRESET
T
A
= -55° to 125° C for all packages
ENABLE signals are low. Advancement is inhibited when the
CARRY IN or PRESET ENABLE signals are high. The CARRY OUT
signal is normally high and goes low when the counter reaches its
maximum count in the UP mode or the minimum count in the DOWN
mode provided the CARRY IN signal is low. The CARRY IN signal in the low state can thus be considered a CLOCK
ENABLE. The CARRY IN terminal must be connected to GND when
not in use.
PIN ASSIGNMENT
Binary counting is accomplished when the BINARY/DECADE
input is high; the counter counts in the decade mode when the
BINARY/DECADE input is low. The counter counts up when the
UP/DOWN input is high, and down when the UP/DOWN input is low.
Parallel clocking provides synchronous control and hence faster
response from all counting outputs. Ripple-clocking allows for longer
clock input rise and fall times.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
PIN 16=V
CC
PIN 8= GND
Rev. 00
IW4029B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
P
D
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±10
750
500
100
-65 to +150
260
Unit
V
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IW4029B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-Level
Output Voltage
Maximum Low-Level
Output Voltage
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output
Low (Sink) Current
Test Conditions
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
V
IN
=GND or V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
Guaranteed Limit
≥-55°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.64
1.6
4.2
-2
-0.64
-1.6
-4.2
25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±1.0
150
300
600
3000
0.36
0.9
2.4
mA
-1.15
-0.36
-0.9
-2.4
Unit
V
V
IL
V
V
OH
V
V
OL
V
IN
=GND or V
CC
V
I
IN
I
CC
V
IN
= GND or V
CC
V
IN
= GND or V
CC
μA
μA
I
OL
V
IN
= GND or V
CC
U
OL
=0.4 V
U
OL
=0.5 V
U
OL
=1.5 V
mA
I
OH
Minimum Output
V
IN
= GND or V
CC
High (Source) Current U
OH
=2.5 V
U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
Rev. 00
IW4029B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
max
Parameter
Maximum Clock Frequency (Figure 1)
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
-
2
4
5.5
500
240
180
560
260
190
470
200
160
640
290
210
340
140
100
200
100
80
Guaranteed Limit
≥-55°C
25°C
2
4
5.5
500
240
180
560
260
190
470
200
160
640
290
210
340
140
100
200
100
80
7.5
≤125°C
1
2
2.75
1000
480
360
1120
520
380
940
400
320
1280
580
420
680
280
200
400
200
160
Unit
MHz
t
PHL
, t
PLH
Maximum Propagation Delay, Clock to Q
(Figure 1)
Maximum Propagation Delay, Clock to Carry
Output (Figure 1)
Maximum Propagation Delay, Preset Enable
to Q (Figure 1)
Maximum Propagation Delay, Preset Enable to
Carry Output (Figure 1)
Maximum Propagation Delay, Carry Input to
Carry Output (Figure 1)
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Input Capacitance
ns
t
PHL
, t
PLH
ns
t
PHL
, t
PLH
ns
t
PHL
, t
PLH
ns
t
PHL
, t
PLH
ns
t
THL
, t
TLH
ns
C
IN
pF
FUNCTION TABLE
CONTROL INPUT
BIN/DEC
(B/D)
UP/DOWN
(U/D)
PRESET ENABLE
(PE)
CARRY IN (CI)
(CLOCK ENABLE)
LOGIC LEVEL
H
L
H
L
H
L
H
L
ACTION
BINARY COUNT
DECADE COUNT
UP COUNT
DOWN COUNT
JAM IN
NO JAM
NO COUNTER ADVANCE AT POS.
CLOCK TRANSITION
ADVANCE COUNTER AT POS.
CLOCK TRANSITION
Rev. 00
IW4029B
TIMING REQUIREMENTS
(C
L
=50pF, R
L
=200 kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
w
Parameter
Minimum Pulse Width, Clock (Figure 1)
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
180
90
60
130
70
50
340
140
100
200
110
80
50
30
25
200
70
60
15
15
15
Guaranteed Limit
≥-55°C
25°C
180
90
60
130
70
50
340
140
100
200
110
80
50
30
25
200
70
60
15
15
15
≤125°C
360
180
120
260
140
100
680
280
200
400
220
160
100
60
50
400
140
120
30
30
30
Unit
ns
t
w
Minimum Pulse Width, Preset Enable
(Figure 1)
Minimum Setup Time, Clock to B/D or U/D
(Figure 1)
Minimum Removal Time, Preset Enable (Figure
1)
Minimum Hold Time, Clock to Carry In (Figure
2)
Minimum Setup Time, Carry In to Clock
(Figure 1)
Maximum Input Rise and Fall Times,Clock
(Figure 2)
ns
t
su*
ns
t
rem*
ns
t
h**
ns
t
su
ns
t
r
, t
f**
μs
*
**
From Up/Down, Binary/Decode, Carry In, or Preset Enable Control Inputs to Clock Edge.
From Carry In to Clock Edge
Rev. 00
Embedded System
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