IN74HC193D datasheet, PDF - EEWORLD Datasheet

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IN74HC193D: Descriptionpresettable 4-bit binary UP/down counter high-performance silicon-gate cmos; File Size229KB，7 Pages; ManufacturerIK Semicon; Websitehttp://www.iksemi.com/en/index.html

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IN74HC193D Overview

presettable 4-bit binary UP/down counter high-performance silicon-gate cmos

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TECHNICAL DATA

IN74HC193

Presettable 4-Bit Binary UP/DOWN Counter

High-Performance Silicon-Gate CMOS

The IN74HC193 is identical in pinout to the LS/ALS193. The

device inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LS/ALSTTL outputs.

The counter has two separate clock inputs, a Count Up Clock and

Count Down Clock inputs. The direction of counting is determined by

which input is clocked. The outputs change state synchronous with the

LOW-to-HIGH transitions on the clock inputs. This counter may be

preset by entering the desired data on the P0, P1, P2, P3 input. When

the Parallel Load input is taken low the data is loaded independently of

either clock input. This feature allows the counters to be used as

devide-by-n by modifying the count lenght with the preset inputs. In

addition the counter can also be cleared. This is accomplished by

inputting a high on the Master Reset input. All 4 internal stages are set

to low independently of either clock input.Both a Terminal Count

Down (TC

) and Terminal Count Up (TC

) Outputs are provided to

enable cascading of both up and down counting functions. The TC

output produces a negative going pulse when the counter underflows

and TC

outputs a pulse when the counter overflows. The counter can

be cascaded by connecting the TC

and TC

outputs of one device to

the Count Up Clock and Count Down Clock inputs, respectively, of the

next device.

•

Outputs Directly Interface to CMOS, NMOS, and TTL

•

Operating Voltage Range: 2.0 to 6.0 V

•

Low Input Current: 1.0

µA

•

High Noise Immunity Characteristic of CMOS Devices

ORDERING INFORMATION

IN74HC193N Plastic

IN74HC193D SOIC

= -55° to 125° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

PIN 16 =V

PIN 8 = GND

258

IN74HC193D Related Products

	IN74HC193D	IN74HC193N	IN74HC193
Description	presettable 4-bit binary UP/down counter high-performance silicon-gate cmos	presettable 4-bit binary UP/down counter high-performance silicon-gate cmos	presettable 4-bit binary UP/down counter high-performance silicon-gate cmos

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