IN74HCT20
D
UAL
4-I
NPUT
NAND G
ATE
High-Performance Silicon-Gate CMOS
The IN74HCT20 is identical in pinout to the LS/ALS20. The
IN74HCT20 may be used as a level converter for interfacing TTL
or NMOS outputs to High-Speed CMOS inputs.
•
TTL/NMOS-Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
µA
High Noise Immunity Characteristic of CMOS Devices
•
•
•
•
ORDERING INFORMATION
IN74HCT20N Plastic
IN74HCT20D SOIC
T
A
= -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =V
CC
PIN 7 = GND
PINS 3,11 = NO CONNECTION
NC = NO CONNECTION
FUNCTION TABLE
Inputs
Output
A
B
C
D
Y
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
H
L
X = don’t care
1
IN74HCT20
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
V
IN
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
mA
±20
I
OUT
DC Output Current, per Pin
mA
±25
I
CC
DC Supply Current, V
CC
and GND Pins
mA
±50
P
D
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
T
L
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
A
Operating Temperature, All Package Types
t
r
, t
f
Input Rise and Fall Time (Figure 1)
Min
4.5
0
-55
0
Max
5.5
V
CC
+125
500
Unit
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
2
IN74HCT20
AC ELECTRICAL CHARACTERISTICS(V
CC
=5.0 V
±10%,C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Guaranteed Limit
Symbol
Parameter
25
°C ≤85°C ≤125°
Unit
C
to
-55°C
t
PLH
,
Maximum Propagation Delay, Input A
28
35
42
ns
t
PHL
,B,C or D to Output Y (Figures 1 and 2)
t
TLH
, t
THL
Maximum Output Transition Time, Any
15
19
22
ns
Output (Figures 1 and 2)
C
IN
Maximum Input Capacitance
10
10
10
pF
Power Dissipation Capacitance (Per
Gate)
Used to determine the no-load dynamic
power
consumption:
2
P
D
=C
PD
V
CC
f+I
CC
V
CC
Typical @25°C,V
CC
=5.0
V
29
C
PD
pF
Figure 1. Switching Waveforms
Figure 2. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/2 of the Device)
4
Embedded System
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