SSM20N03S,P
N-CHANNEL ENHANCEMENT-MODE
POWER MOSFET
Dynamic dv/dt rating
Repetitive-avalanche rated
Fast switching
Simple drive requirement
D
BV
DSS
R
DS(ON)
I
D
30V
52m
Ω
20A
G
S
Description
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
The TO-263 package is widely preferred for commercial and
industrial surface mount applications and suited for low voltage
applications such as DC/DC converters. The through-hole version
(SSM20N03P) is available for low-footprint applications.
G
D
G D
S
TO-263
TO-220
S
Units
V
V
A
A
A
W
W/
℃
℃
℃
Absolute Maximum Ratings
Symbol
V
DS
V
GS
I
D
@T
C
=25℃
I
D
@T
C
=100℃
I
DM
P
D
@T
C
=25℃
T
STG
T
J
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
1
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
Rating
30
±
20
20
13
58
31
0.25
-55 to 150
-55 to 150
Thermal Data
Symbol
Rthj-case
Rthj-amb
Parameter
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max.
Max.
Value
4.0
62
Unit
℃/W
℃/W
Rev.2.01 6/26/2003
www.SiliconStandard.com
1 of 6
SSM20N03S,P
Electrical Characteristics @ T
j
=25
o
C (unless otherwise specified)
Symbol
BV
DSS
ΔBV
DSS
/ΔT
j
Parameter
Drain-Source Breakdown Voltage
Test Conditions
V
GS
=0V, I
D
=250uA
Min.
30
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
0.037
Max. Units
-
-
52
85
3
-
1
100
±100
-
-
-
-
-
-
-
-
-
-
V
V/℃
mΩ
mΩ
V
S
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
Breakdown Voltage Temperature Coefficient
Reference to 25℃, I
D
=1mA
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=10V, I
D
=10A
V
GS
=4.5V, I
D
=8A
-
-
-
3
-
-
-
6.1
1.4
4
4.9
29
14.3
3.6
290
160
45
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Gate Threshold Voltage
Forward Transconductance
Drain-Source Leakage Current (T
j
=25
o
C)
Drain-Source Leakage Current (T
j
=150
o
C)
V
DS
=V
GS
, I
D
=250uA
V
DS
=10V, I
D
=10A
V
DS
=30V, V
GS
=0V
V
DS
=24V, V
GS
=0V
V
GS
=
±
20V
I
D
=10A
V
DS
=24V
V
GS
=5V
V
DS
=15V
I
D
=20A
R
G
=3.3Ω,V
GS
=10V
R
D
=0.75Ω
V
GS
=0V
V
DS
=25V
f=1.0MHz
Gate-Source Leakage
Total Gate Charge
2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Source-Drain Diode
Symbol
I
S
I
SM
V
SD
Parameter
Continuous Source Current ( Body Diode )
Test Conditions
V
D
=V
G
=0V , V
S
=1.3V
T
j
=25℃, I
S
=20A, V
GS
=0V
Min.
-
-
-
Typ.
-
-
-
Max. Units
20
58
1.3
A
A
V
Pulsed Source Current ( Body Diode )
1
Forward On Voltage
2
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
Rev.2.01 6/26/2003
www.SiliconStandard.com
2 of 6
SSM20N03S,P
70
50
T
C
=25
o
C
60
T
C
=150
o
C
V
G
=10V
40
V
G
=10V
V
G
=8.0V
50
V
G
=8.0V
I
D
, Drain Current (A)
30
I
D
, Drain Current (A)
40
V
G
=6.0V
V
G
=6.0V
20
30
V
G
=4.0V
10
20
V
G
=4.0V
10
V
G
=3.0V
V
G
=3.0V
0
0
1
2
3
4
5
6
7
8
9
0
0
1
2
3
4
5
6
7
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
85
1.80
80
I
D
=10A
T
C
=25
o
C
1.60
I
D
=10A
V
G
=10V
75
70
R
DSON
(m
Ω
)
65
60
Normalized R
DS(ON)
1.40
1.20
55
1.00
50
45
0.80
40
35
3
4
5
6
7
8
9
10
11
0.60
-50
0
50
100
150
V
GS
(V)
T
j
, Junction Temperature ( C)
o
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
Rev.2.01 6/26/2003
www.SiliconStandard.com
3 of 6
SSM20N03S,P
25
40
20
30
I
D
, Drain Current (A)
15
P
D
(W)
10
5
0
25
50
75
100
125
150
20
10
0
0
50
100
150
T
c
, Case Temperature (
o
C)
T
c
,Case Temperature(
o
C)
Fig 5. Maximum Drain Current v.s.
Fig 6. Typical Power Dissipation
Case Temperature
100
10
10us
Normalized Thermal Response (R
thjc
)
1
DUTY=0.5
I
D
(A)
10
100us
0.2
0.1
P
DM
SINGLE PULSE
1ms
0.1
0.05
t
T
0.02
0.01
10ms
D=0.01 T
c
=25
o
C
1
1
10
100
Duty factor = t/T
Peak T
j
= P
DM
x R
thjc
+ T
C
100ms
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
V
DS
(V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 6/26/2003
www.SiliconStandard.com
4 of 6
SSM20N03S,P
12
1000
f=1.0MHz
Id=10A
10
V
D
=16V
V
D
=20V
Ciss
V
GS
, Gate to Source Voltage (V)
8
V
D
=24V
C (pF)
Coss
100
6
4
Crss
2
0
0
2
4
6
8
10
12
10
1
6
11
16
21
26
31
Q
G
, Total Gate Charge (nC)
V
DS
(V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
3
10
T
j
= 150
o
C
T
j
= 25 C
1
2
o
V
GS(th)
(V)
1
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-50
0
50
100
150
I
S
(A)
0.1
0.01
V
SD
(V)
T
j
, Junction Temperature(
o
C)
Fig 11. Forward Characteristic of
Reverse Diode
Fig 12. Gate Threshold Voltage v.s.
Junction Temperature
Rev.2.01 6/26/2003
www.SiliconStandard.com
5 of 6