MT88E43BSR datasheet, PDF - EEWORLD Datasheet

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MT88E43BSR: Descriptionextended voltage calling number identification circuit 2; CategoryWireless rf/communication Telecom circuit; File Size546KB，29 Pages; ManufacturerZarlink Semiconductor (Microsemi); Websitehttp://www.zarlink.com/

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MT88E43BSR Overview

extended voltage calling number identification circuit 2

MT88E43BSR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Zarlink Semiconductor (Microsemi)
package instruction	SOP,
Reach Compliance Code	compliant
Other features	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE
JESD-30 code	R-PDSO-G24
JESD-609 code	e0
length	15.4 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	2.65 mm
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm

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MT88E43B

Extended Voltage Calling Number

Identification Circuit 2

CMOS

Data Sheet

Features

•

Compatible with:

• British Telecom (BT) SIN227 & SIN242

•

U.K.’s Cable Communications Association

(CCA) specification TW/P&E/312

Bellcore GR-30-CORE (formerly known as

TR-NWT-000030) & SR-TSV-002476

Ordering Information

MT88E43BE

24 Pin PDIP

MT88E43BS

24 Pin SOIC

MT88E43BSR 24 Pin SOIC

MT88E43BS1 24 Pin SOIC*

MT88E43BSR1 24 Pin SOIC*

*Pb Free Matte Tin

-40°C to +85°C

•

Feature phones, including Analog Display

Services Interface (ADSI) phones

Phone set adjunct boxes

FAX and answering machines

Database query and Computer Telephony

Integration (CTI) systems

Tubes

Tape & Reel

Tubes

Tape & Reel

April 2006

Bellcore "CPE Alerting Signal (CAS)" and BT

"Idle State Tone Alert Signal" detection

Ring and line reversal detection

1200 baud Bell 202 and CCITT V.23 Frequency

Shift Keying (FSK) demodulation

3 or 5 V

±10%

supply voltage

High input sensitivity (-40 dBV Tone and FSK

Detection)

Selectable 3-wire data interface (microcontroller

or MT88E43 controlled)

Low power CMOS with powerdown mode

Input gain adjustable amplifier

Carrier detect status output

Uses 3.58 MHz crystal

Description

The MT88E43 Calling Number Identification Circuit 2

(ECNIC2) is a low power CMOS integrated circuit

intended for receiving physical layer signals

transmitted according to BT (British Telecom) SIN227

& SIN242, the U.K.’s CCA (Cable Communications

Association) TW/P&E/312 and Bellcore GR-30-CORE

& SR-TSV-002476 specifications. The MT88E43 is

suitable for applications using a fixed voltage power

source between 3 and 5 V

±10%.

FSKen

MODE

DCLK

DATA

Applications

•

BT Calling Line Identity Presentation (CLIP), CCA

CLIP, and Bellcore Calling Identity Delivery (CID)

systems

IN+

IN-

Anti-alias

Filter

FSK Bandpass

Filter

FSK

Demodulator

Data Timing

Recovery

To internal

cct.

VRef

CAP

PWDN

Bias

Generator

Carrier

Detector

Interrupt

Generator

INT

Alert Signal High

Tone Filter

To internal cct.

Alert Signal Low

Tone Filter

Oscillator

Tone

Detection

Algorithm

Guard

Time

StD

St/GT

ESt

VDD

VSS

OSCin OSCout TRIGin

TRIGRC

TRIGout

Figure 1 - Functional Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

MT88E43B

Pin Description

Pin #

Name

DATA

Description

Data Sheet

3-wire Interface: Data (CMOS Output).

In mode 0 data appears at the pin once demodulated.

In mode 1 data is shifted out on the rising edge of the microcontroller supplied DCLK.

3-wire Interface: Data Ready (CMOS Output).

Active low. In mode 0 this output goes low after

the last DCLK pulse of each data word. This identifies the 8-bit word boundary on the serial

output stream. Typically, DR is used to latch 8-bit words from a serial-to-parallel converter into a

microcontroller. In mode 1 this pin will signal the availability of data.

Carrier Detect (CMOS Output).

Active low. A logic low indicates the presence of in-band signal

at the output of the FSK bandpass filter.

Interrupt (Open Drain Output).

Active low. It is active when TRIGout or DR is low, or StD is

high. This output stays low until all three signals have become inactive.

Dual Tone Alert Signal Delayed Steering Output (CMOS Output).

When high, it indicates

that a guard time qualified alert signal has been detected.

Dual Tone Alert Signal Early Steering Output (CMOS Output).

Alert signal detection output.

Used in conjunction with St/GT and external circuitry to implement the detect and non-detect

guard times.

Dual Tone Alert Signal Steering Input/Guard Time (Analog Input/CMOS Output).

A voltage

greater than V

TGt

(see Figure 4) at the St/GT pin causes the device to indicate that a dual tone

has been detected by asserting StD high. A voltage less than V

TGt

frees the device to accept a

new dual tone.

Positive Power Supply.

INT

StD

ESt

St/GT

The MT88E43 provides all the features and functions offered by Zarlink’s MT8841 (CNIC), including 1200 baud Bell

202 and CCITT V.23 FSK demodulation. The 3-wire serial data interface provided by CNIC has been enhanced to

operate in two modes. In the CNIC compatible mode data transfer is initiated by the device. A second mode allows

a microcontroller to extract 8-bit data words from the device. Furthermore, the MT88E43 offers Idle State Tone Alert

Signal and line reversal detection capability for BT’s CLIP, ring burst detection for the U.K.’s CCA’s CLIP, and ring

and CAS detection for Bellcore’s CID.

Functional Overview

The MT88E43, Extended Voltage Calling Number Identification Circuit 2 (ECNIC2) is a device compatible with BT,

the U.K.’s CCA and Bellcore specifications. As shown in Figure 1, the MT88E43 provides an FSK demodulator as

well as a 3-wire serial interface similar to that of it’s predecessor, the MT8841 (CNIC). The 3-wire interface has

been enhanced to provide two modes of operation - a mode whereby data transfer is initiated by the device and a

mode whereby data transfer is initiated by an external microcontroller.

In addition to supporting all the features and functions of the MT8841, the MT88E43 also provides line reversal

detection, ring detection and dual tone alert signal/CAS detection. These new functions eliminate some external

circuitry previously required with the MT8841.

The MT88E43 is compatible with the caller identity specifications of BT, the U.K.’s CCA, and Bellcore.

BT specifications SIN227 and SIN242 describe the signalling mechanism between the network and the Terminal

Equipment (TE) for the Caller Display Service (CDS). CDS provides Calling Line Identity Presentation (CLIP),

which delivers to an on hook (idle state) TE the identity of an incoming caller before the first ring.

An incoming CDS call is indicated by a polarity reversal on the A and B wires (see Figure 3), followed by an Idle

State Tone Alert Signal. Caller ID FSK information is then transmitted in CCITT V.23 format. MT88E43 can detect

the line reversal, tone alert signal, and demodulate the incoming CCITT V.23 FSK signals.

Zarlink Semiconductor Inc.

MT88E43B

1. Line Reversal Detection

Data Sheet

Line reversal, or polarity reversal on the A and B wires indicates the arrival of an incoming CDS call, as specified in

SIN227. When the event (line reversal) occurs, TRIGin rises past the high going Schmitt threshold V

T+

and

TRIGout, which is normally high, is pulled low. When the event is over, TRIGin falls back to below the low going

Schmitt threshold V

T-

and TRIGout returns high. The components R5 and C3 (see Figure 3) at TRIGRC ensure a

minimum TRIGout low interval.

In a TE designed for CLIP, the TRIGout high to low transition may be used to interrupt or wake-up the

microcontroller. The controller can thus be put into power-down mode to conserve power in a battery operated TE.

2. Ring Burst Detection

CCA does not support the dual tone alert signal (refer to Dual Tone Alert Signal Detection section). Instead, CCA

requires that the TE be able to detect a single burst of ringing (duration 200-450 ms) that precedes CLIP FSK data.

The ring burst may vary from 30 to 75 Vrms and is approximately 25 Hz.

Again in a TE designed for CCA CLIP, the TRIGout high to low transition may be used to interrupt or wake-up the

microcontroller. The controller can thus be put into power-down mode to conserve power in a battery operated TE.

3. Ring Detection

In Bellcore’s CND/CNAM scheme, the CID FSK data is transmitted between the first and second ringing cycles.

The circuit in Figure 3 will generate a ring envelope signal (active low) at TRIGout for a ring voltage of at least

40 Vrms. R5 and C3 filter the ring signal to provide an envelope output.

The diode bridge shown in Figure 3 works for both single ended and balanced ringing. A fraction of the ring voltage

is applied to the TRIGin input. When the voltage at TRIGin is above the Schmitt trigger high going threshold V

T+

TRIGRC is pulled low as C3 discharges. TRIGout stays low as long as the C3 voltage stays below the minimum

T+

In a CPE designed for CND/CNAM, the TRIGout high to low transition may be used to interrupt or wake-up the

microcontroller. The controller can thus be put into power-down mode to conserve power.

If precise ring duration determination is critical, capacitor C3 in Figure 3 may be removed. The microcontroller will

now be able to time the ring duration directly. The result will be that TRIGout will be low only as long as the ringing

signal is present. Previously the RC time constant would cause only one interrupt.

Dual Tone Alert Signal Detection

The BT on hook (idle state) caller ID scheme uses a dual tone alert signal whose characteristics are shown in Table

Bellcore specifies a similar dual tone alert signal called CPE Alerting Signal (CAS) for use in off-hook data

transmission (see Table 1). Bellcore states that the CPE should be able to detect the CAS in the presence of near

end speech. The CAS detector should also be immune to imitation from near and far end speech.

In the MT88E43 the dual tone alert signal is separated into a high and a low tone by two bandpass filters. A

detection algorithm examines the two filter outputs to determine the presence of a dual tone alert signal. The ESt

pin goes high when both tones are present. Note that ESt is only a preliminary indication. The indication must be

sustained over the tone present guard time to be considered valid. Tone present and tone absent guard times can

be implemented with external RC components. The tone present guard time rejects signals of insufficient duration.

The tone absent guard time masks momentary detection dropout once the present guard time has been satisfied.

StD is the guard time qualified detector output.

Zarlink Semiconductor Inc.

MT88E43BSR Related Products

	MT88E43BSR	MT88E43BS	MT88E43BSR1	MT88E43BS1	MT88E43BE
Description	extended voltage calling number identification circuit 2	extended voltage calling number identification circuit 2	extended voltage calling number identification circuit 2	extended voltage calling number identification circuit 2	extended voltage calling number identification circuit 2
Is it Rohs certified?	incompatible	incompatible	conform to	conform to	incompatible
Maker	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)
package instruction	SOP,	SOP, SOP24,.4	SOP,	SOP,	DIP, DIP24,.6
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
Other features	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE	IT CAN ALSO OPERATE WITH 5V NOMINAL VOLTAGE
JESD-30 code	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDIP-T24
JESD-609 code	e0	e0	e3	e3	e0
length	15.4 mm	15.4 mm	15.4 mm	15.4 mm	30.99 mm
Number of functions	1	1	1	1	1
Number of terminals	24	24	24	24	24
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP	DIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	IN-LINE
Peak Reflow Temperature (Celsius)	240	225	260	260	225
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.65 mm	2.65 mm	2.65 mm	2.65 mm	6.35 mm
Nominal supply voltage	3 V	3 V	3 V	3 V	3 V
surface mount	YES	YES	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Telecom integrated circuit types	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT	TELEPHONE CALLING NO IDENTIFICATION CIRCUIT
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn/Pb)	MATTE TIN	MATTE TIN	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30
width	7.5 mm	7.5 mm	7.5 mm	7.5 mm	15.24 mm
Humidity sensitivity level	1	-	3	3	-

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