CONFIGURATION SPACE ............................................................................................................................................... 23
PCI CONFIGURATION SPACE REGISTER MAP........................................................................................................ 24
PCI ACCESS TO INTERNAL UARTS........................................................................................................................... 26
PCI ACCESS TO 8-BIT LOCAL BUS............................................................................................................................ 27
PCI ACCESS TO PARALLEL PORT ............................................................................................................................ 28
ACCESSING LOCAL CONFIGURATION REGISTERS................................................................................................... 29
LOCAL CONFIGURATION AND CONTROL REGISTER ‘LCC’ (OFFSET 0X00) ........................................................ 29
POWER MANAGEMENT .................................................................................................................................................. 39
POWER MANAGEMENT OF FUNCTION 0 ................................................................................................................. 39
POWER MANAGEMENT OF FUNCTION 1 ................................................................................................................. 40
TRANSMITTER AND RECEIVER FIFOS ......................................................................................................................... 54
FIFO CONTROL REGISTER ‘FCR’ .............................................................................................................................. 54
LINE CONTROL & STATUS............................................................................................................................................. 55
FALSE START BIT DETECTION.................................................................................................................................. 55
LINE CONTROL REGISTER ‘LCR’............................................................................................................................... 55
LINE STATUS REGISTER ‘LSR’ .................................................................................................................................. 56
INTERRUPT STATUS REGISTER ‘ISR’....................................................................................................................... 58
MODEM CONTROL REGISTER ‘MCR’........................................................................................................................ 59
6.7.2
MODEM STATUS REGISTER ‘MSR’ ........................................................................................................................... 60
6.8
OTHER STANDARD REGISTERS ................................................................................................................................... 60
ENHANCED FEATURES REGISTER ‘EFR’................................................................................................................. 61
6.9.2
SPECIAL CHARACTER DETECTION .......................................................................................................................... 62
6.9.3
AUTOMATIC IN-BAND FLOW CONTROL ................................................................................................................... 62
6.9.4
AUTOMATIC OUT-OF-BAND FLOW CONTROL ......................................................................................................... 62
GENERAL OPERATION ............................................................................................................................................... 63
TIMES CLOCK REGISTER ‘TCR’................................................................................................................................. 63
6.11 ADDITIONAL FEATURES ................................................................................................................................................ 65
6.11.1
ADDITIONAL STATUS REGISTER ‘ASR’ .................................................................................................................... 65
6.11.2
FIFO FILL LEVELS ‘TFL & RFL’ ................................................................................................................................... 66
6.11.3
ADDITIONAL CONTROL REGISTER ‘ACR’................................................................................................................. 66
6.11.12 GOOD-DATA STATUS REGISTER ‘GDS’.................................................................................................................... 69
6.11.13 PORT INDEX REGISTER ‘PIX’..................................................................................................................................... 69
PARALLEL PORT INTERRUPT ....................................................................................................................................... 74
DEVICE STATUS REGISTER ‘DSR’ ............................................................................................................................ 75
DEVICE CONTROL REGISTER ‘DCR’......................................................................................................................... 76
EPP DATA REGISTERS ‘EPPD1-4’ ............................................................................................................................. 76
Page 4
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.2
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
BIDIRECTIONAL PARALLEL PORT .................................................................................................. 73
DS-0020 Jun 05
OXFORD SEMICONDUCTOR LTD.
8.3.7
8.3.8
8.3.9
8.3.10
8.3.11
OXmPCI952
ECP DATA FIFO ........................................................................................................................................................... 76
TEST FIFO .................................................................................................................................................................... 76
CONFIGURATION A REGISTER ................................................................................................................................. 76
CONFIGURATION B REGISTER ................................................................................................................................. 76
EXTENDED CONTROL REGISTER ‘ECR’................................................................................................................... 77
ZONE 0: HEADER ........................................................................................................................................................ 79
ZONE 1: LOCAL CONFIGURATION REGISTERS....................................................................................................... 80
ZONE 2: IDENTIFICATION REGISTERS ..................................................................................................................... 81
ZONE 3: PCI CONFIGURATION REGISTERS ............................................................................................................ 81
ZONE 5 : FUNCTION ACCESS .................................................................................................................................... 82
DC ELECTRICAL CHARACTERISTICS .......................................................................................................................... 84
AC ELECTRICAL CHARACTERISTICS.......................................................................................... 86
PCI BUS ............................................................................................................................................................................ 86
LOCAL BUS...................................................................................................................................................................... 86
SERIAL PORTS ................................................................................................................................................................ 88
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