CXA1720Q
Read/Write Amplifier (with Built-in Filters) for FDDs
For the availability of this product, please contact the sales office.
Description
The CXA1720Q is an IC for use with floppy disk
drives, and contains a Read circuit (with built-in
filters), Write circuit, Erase circuit, and supply
voltage detection circuit, all into a single chip.
Features
•
Single 5 V power supply.
•
Filter system can be switched among four modes:
1M/2M, and inner track/outer track. This allows for
a significant reduction in the number of external
parts such as differentiator constants, low-pass
filters, and switches. (Compared with conventional
Sony products, the number of parts has been
reduced by one-half.)
•
Filter characteristics can be customized.
•
Low pre-amplifier input conversion noise voltage of
2.0 nV/
√
Hz (typ.) keeps Read data output jitter to
a minimum. The pre-amplifier voltage gain can be
selected as either 100× or 200×.
•
The monostable multivibrator No. 1 pulse width
switching function for the time domain filter permits
switching between 1M and 2M mode.
•
Write current switching function permits switching
of the Write current among four modes: 1M/2M
and inner track/outer track. (Filter inner track/outer
track switching is separate.)
HEAD 1A
HEAD 0A
HEAD 0B
HEAD 1B
32 pin QFP (Plastic)
•
Supply voltage detection circuit prohibits error
writing during power ON/OFF or abnormal voltage.
•
Power consumption is kept down to 115 mW (typ.)
and this IC is suitable for use with battery-driven
FDDs.
•
Built in Time constant capacitors for monostable
multivibrator Nos. 1 and 2. (The pulse width for
monostable multivibrator No. 2 is fixed.)
•
Power saving function reduces power consumption
when the IC is not in use. When in power saving
mode (5 mW typ.), only the power supply ON/OFF
detector functions.
•
The Write driver has a built-in reset circuit. When
the mode is switched from Read mode to Write
mode, the Write current flows from head 0A if head
side 0 is selected and from head 1A if head side 1
is selected.
PREAMP
OUT
Block Diagram and Pin Configuration
24
23
22
21
20
19
18
FILTER
OUT A
17
VREF
HIGH
GAIN
W/C 1 25
SET
W/C 1
COMP 26
W/C 2
SET 27
W/C 2
COMP 28
D.GND 29
ERASE
OUT 0 30
ERASE
OUT 1 31
POWER 32
SAVE
POWER
MONITOR
WRITE
DRIVER
PREAMP
FILTER
DIFF+LPF
(BPF)
FILTER
16 OUT B
15 COMP
IN B
14 COMP
IN A
13 A.GND
COMP
ERASE
DRIVER
12 MMVA
FILTER
11 SET
CONTROL
LOGIC
TIME
DOMAIN
FILTER
10 Vcc
HIGH
DENSITY
9
1
POWER
ON
2
WRITE
DATA
3
READ
DATA
4
WRITE
CURRENT
5
WRITE
GATE
6
ERASE
GATE
7
SIDE 1
8
FILTER
CONTROL
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E93717-TE
CXA1720Q
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
(Ta=25 °C)
•
Supply voltage
•
Digital signal input pin (note) input voltage
•
Power ON output applied voltage
•
Erase output applied voltage
•
Head 0A, 0B, 1A, 1B applied voltage
•
Power ON output sink current
•
Erase output sink current
•
Operating temperature
•
Storage temperature
•
Allowable power dissipation
Supply Voltage Range
V
CC
4.4 to 6.0
V
Topr
Tstg
P
D
V
CC
7
–0.5 to V
CC
+0.3
V
CC
+0.3
V
CC
+0.3
15
7
30
–20 to +75
–65 to +150
500
V
V
V
V
V
mA
mA
°C
°C
mW
Note)
WRITE DATA, WRITE CURRENT, WRITE GATE, ERASE GATE
SIDE1, FILTER CONTROL, HIGH DENSITY, HIGH GAIN, POWER SAVE
—2—
CXA1720Q
Pin Description
Pin
No.
1
Symbol
POWER ON
Pin voltage
—
100k
1
Equivalent circuit
Vcc
(Ta=25 °C, V
CC
=5 V)
Description
Reduced voltage detection output.
This is an open collector that outputs a low signal
when V
CC
is below the specified value.
A.GND
2
WRITE
DATA
—
Vcc
Write data input.
This pin is a Schmitt-type input and is triggered
when the logical voltage goes from high to low.
1k
2
2.3V
3
READ
DATA
—
140
A.GND
Read data output.
This pin is active when the logical voltage of the
Write gate signal and the Erase gate signal is high.
3
Vcc
D.GND
4
5
6
7
WRITE
CURRENT
WRITE
GATE
ERASE
GATE
SIDE1
—
—
—
—
100k
8
9
4
5
6
7
1k
2.1V
A.GND
Write current control. The Write current is
increased when the logical voltage is low.
Write gate signal input. The Write system is active
when the logical voltage is low.
Erase gate signal input. The Erase system is
active when the logical voltage is low.
Head side switching signal input. The HEAD1
system is active when the logical voltage is low,
and the HEAD0 system is active when the logical
voltage is high, but only when the logical voltage
for the Write gate and the Erase gate is high.
Filter inner track/outer track mode control. Inner
track mode is selected when the logical voltage is
low.
Filter, time domain filter and Write current 1M/2M
mode control. 2M mode is selected when the
logical voltage is low.
Pre-amplifier voltage gain selection. Gain of 100x
is selected when the logical voltage is high; gain of
200x is selected when the logical voltage is low.
Vcc
8
FILTER
CONTROL
HIGH
DENSITY
HIGH
GAIN
—
20
9
—
20
—
—3—
CXA1720Q
Pin
No.
10
11
Symbol
V
CC
FILTER
SET
Pin voltage
—
3.8 V
Equivalent circuit
Description
Power supply (5 V) connection.
Connection for filter cut-off frequency setting
resistor. Connect the filter cut-off frequency setting
resistor R
F
between this pin and V
CC
to set the cut-
off frequency.
Vcc
1k
1.2V
147
11
A.GND
12
MMVA
0.5 V
Vcc
Time domain filter monostable multivibrator No. 1
pulse width setting pin. Connect the monostable
multivibrator No. 1 pulse width setting resistor R
A
between this pin and A.GND.
147
12
1.2V
A.GND
13
14
A. GND
COMP IN A
—
3.3 V
10k
14
147
15
COMP IN B
3.3 V
15
147
10k
16k
Analog system GND connection.
Comparator differential inputs.
Vcc
60µ
16
FILTER
OUT B
3.3 V
140
140
Vcc
A.GND
Filter differential outputs.
16
17
FILTER
OUT A
3.3 V
17
500µ
500µ
A.GND
—4—
CXA1720Q
Pin
No.
18
Symbol
VREF
Pin voltage
2.8 V
Equivalent circuit
Vcc
Description
Connection for internal reference voltage
decoupling capacitor. Connect the decoupling
capacitor CREF between this pin and A.GND.
500
18
120µ
19
PREAMP
OUT
2.8 V
140
A.GND
Vcc
Pre-amplifier output.
19
320µ
21
22
23
24
HEAD 1B
HEAD 1A
HEAD 0B
HEAD 0A
—
—
—
—
24 23 22 21
A.GND
Connection for magnetic head input/output.
Connect the recording/playback magnetic head to
these pins, and connect the center tap to V
CC
.
When the logical voltage for Pin 7 (SIDE1) is low,
the HEAD1 system is active; when the logical
voltage is high, the HEAD0 system is active.
A.GND
25
W/C1SET
Vcc
1.2V
147
147
25
27
Connection for 1M write current setting resistor.
Connect the Write current setting resistor R
W1
between this pin and V
CC
to set the Write current.
27
W/C2SET
Connection for 2M Write current setting resistor.
Connect the Write current setting resistor R
W2
between this pin and V
CC
to set the Write current.
A.GND
26
W/C1
COMP
—
Vcc
Connection for 1M Write current compensation
resistor.
Connect the Write current compensation resistor
R
WC1
between this pin and Pin 25 (W/C1SET) to
set the amount of increase in the Write current.
Connection for 2M Write current compensation
resistor.
Connect the Write current compensation resistor
R
WC2
between this pin and Pin 27 (W/C2SET) to
set the amount of increase in the Write current.
26
28
W/C2
COMP
—
28
A.GND
—5—
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