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HI-516
Data Sheet
April 1, 2005
FN3146.4
16-Channel/Differential 8-Channel, CMOS
High Speed Analog Multiplexer
The Hl-516 is a monolithic, dielectrically isolated, high-
speed, high-performance CMOS analog multiplexer. It
offers unique built-in channel selection decoding plus an
inhibit input for disabling all channels. The dual function of
address input A
3
enables the Hl-516 to be user
programmed either as a single ended 16-Channel
multiplexer by connecting ‘out A’ to ‘out B’ and using A
3
as
a digital address input, or as an 8-Channel differential
multiplexer by connecting A
3
to the V- supply. The
substrate leakages and parasitic capacitances are reduced
substantially by using the Intersil Dielectric Isolation
process to achieve optimum performance in both high and
low level signal applications. The low output leakage
current (l
D(OFF)
< 100pA at 25
o
C) and fast settling
(t
SETTLE
= 800ns to 0.01%) characteristics of the device
make it an ideal choice for high speed data acquisition
systems, precision instrumentation, and industrial process
control.
For MIL-STD-883 compliant parts, request the Hl-516/883
data sheet.
Features
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . . 130ns
• Settling Time . . . . . . . . . . . . . . . . . . . . . . . . 250ns (0.1%)
• Low Leakage (Typical)
- I
S(OFF)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10pA
- I
D(OFF)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pA
• Low Capacitance (Max)
- C
S(OFF)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pF
- C
D(OFF)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25pF
• Off Isolation at 500kHz . . . . . . . . . . . . . . . . . . 55dB (Min)
• Low Charge Injection Error . . . . . . . . . . . . . . . . . . . 20mV
• Single Ended to Differential Selectable (SDS)
• Logic Level Selectable (LLS)
•
Pb-Free Available (RoHS Compliant)
Applications
• Data Acquisition Systems
• Precision Instrumentation
• Industrial Control
Ordering Information
PART NUMBER
HI3-0516-5
HI3-0516-5Z
(See Note)
TEMP.
RANGE (
o
C)
0 to 75
0 to 75
PACKAGE
28 Ld PDIP
28 Ld PDIP*
(Pb-free)
PKG.
DWG. #
E28.6
E28.6
Pinout
HI-516 (PDIP)
TOP VIEW
V+ 1
OUT B 2
NC 3
IN 16/8B 4
IN 15/7B 5
28 OUT A
27 V-
26 IN 8/8A
25 IN 7/7A
24 IN 6/6A
23 IN 5/5A
22 IN 4/4A
21 IN 3/3A
20 IN 2/2A
19 IN 1/1A
18 ENABLE
17 A
0
16 A
1
15 A
2
*Pb-free
PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
IN 14/6B 6
IN 13/5B 7
IN 12/4B 8
IN 11/3B 9
IN 10/2B 10
IN 9/1B 11
GND 12
V
DD
/LLS 13
A
3
/SDS 14
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HI-516
Truth Tables
HI-516 USED AS A 16-CHANNEL MULTIPLEXER OR
DUAL 8-CHANNEL MULTIPLEXER (NOTE 1)
USE A
3
AS DIGITAL ADDRESS INPUT
ENABLE
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
NOTE:
1. For 16-channel single-ended function, tie ‘out A’ to ‘out B’; for
dual 8-channel function use the A
3
address pin to select
between MUX A and MUX B, where MUX A is selected with A
3
low.
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
A
3
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A
2
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
1
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
A
0
ON CHANNEL TO
OUT A
None
1A
2A
3A
4A
5A
6A
7A
8A
None
None
None
None
None
None
None
None
OUT B
None
None
None
None
None
None
None
None
None
1B
2B
3B
4B
5B
6B
7B
8B
HI-516 USED AS A DIFFERENTIAL 8-CHANNEL MULTIPLEXER
A
3
CONNECTED TO V- SUPPLY
ENABLE
L
H
H
H
H
H
H
H
H
A
2
X
L
L
L
L
H
H
H
H
A
1
X
L
L
H
H
L
L
H
H
A
0
X
L
H
L
H
L
H
L
H
ON CHANNEL TO
OUT A
None
1A
2A
3A
4A
5A
6A
7A
8A
OUT B
None
1B
2B
3B
4B
5B
6B
7B
8B
2
HI-516
Functional Block Diagram
V
DD
/LLS
IN 1A
N
EN
A
0
A
1
A
2
A
3
Q
A
3
DECODER
Q
N
P
OUT B
DECODER
IN 8B
N
P
N
P
DECODER
IN 8A
P
OUT A
IN 1B
INPUT BUFFER AND DECODERS
MULTIPLEXER
SWITCHES
A
3
DECODE
A
3
H
L
V-
Q
H
L
L
Q
L
H
L
3
HI-516
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33V
Analog Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V
IN
, V
OUT
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (V
DD
/LLS Pin = GND or Open)
V
A0-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
V
A3/SDS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (V
DD
/LLS Pin = V
DD
)
V
A0-3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Thermal Information
Thermal Resistance (Typical, Note 2)
θ
JA
(
o
C/W)
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
Maximum Junction Temperature
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
Operating Conditions
Temperature Ranges
HI-516-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; V
AH
(Logic Level High) = 2.4V, V
AL
(Logic Level Low) = 0.8V;
V
DD
/LLS = GND. (Note 3) Unless Otherwise Specified
-5
TEST
CONDITIONS
TEMP
(
o
C)
PARAMETER
DYNAMIC CHARACTERISTICS
Access Time, t
A
MIN
TYP
MAX
UNITS
25
Full
-
-
10
-
-
-
-
-
55
-
-
130
-
20
120
140
250
800
-
-
-
-
175
225
-
175
175
-
-
20
-
10
25
ns
ns
ns
ns
ns
ns
ns
mV
dB
pF
pF
Break-Before-Make Delay, t
OPEN
Enable Delay (ON), t
ON(EN)
Enable Delay (OFF), t
OFF(EN)
Settling Time
To 0.1%
To 0.01%
Charge Injection Error
Off Isolation
Channel Input Capacitance, C
S(OFF)
Channel Output Capacitance,
C
D(OFF)
Digital Input Capacitance, C
A
Input to Output Capacitance,
C
DS(OFF)
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, V
AL
(TTL)
Input High Threshold, V
AH
(TTL)
Input Low Threshold, V
AL
(CMOS)
Input High Threshold, V
AH
(CMOS)
Input Leakage Current, I
AH
(High)
Note 3
Note 3
Note 3
Note 3
Note 6
Note 7
25
25
25
25
25
25
25
25
25
25
25
-
-
-
0.02
10
-
pF
pF
Full
Full
Full
Full
Full
-
2.4
-
0.7V
DD
-
-
-
-
-
-
0.8
-
0.3V
DD
-
1
V
V
V
V
µA
4
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