TS4985
2 X 1.2W Stereo Audio Power Amplifier with
Dedicated Standby Pins
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Operating from V
CC
=2.2V to 5.5V
1.2W output power per channel @ V
CC
=5V,
THD+N=1%, RL=8Ω
10nA standby current
62dB PSRR @ 217Hz with grounded inputs
High SNR: 106dB(A) typ.
Near zero pop & click
Lead-free 15 bumps, flip-chip package
Flip-chip - 15 bumps
Pin Connection (top view)
VCC2
Description
The TS4985 has been designed for top-class
stereo audio applications. Thanks to its compact
and power-dissipation efficient flip-chip package,
it suits various applications.
With a BTL configuration, this audio power
amplifier is capable of delivering 1.2W per
channel of continuous RMS output power into an
8Ω load @ 5V.
Each output channel (left and right), has an
external controlled standby mode pin (STDBYL &
STDBYR) to reduce the supply current to less
than 10nA per channel. The device also features
an internal thermal shutdown protection.
b
Codes
O
Order
Part Number
TS4985EIJT
TS4985EKIJT
The gain of each channel can be configured by
external gain setting resistors.
et
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ro
P
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d
s)
t(
O
-
s
b
te
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o
VCC1
VO-L
IN-L
ro
P
STDBYL
BYPASS
STDBYR
uc
d
IN+R
VO+R
GND2
s)
t(
IN-R
VO+L
VO-R
IN+L
GND1
Applications
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Cellular mobile phones
Notebook & PDA computers
LCD monitors & TVs
Portable audio devices
Temperature Range
-40, +85°C
Package
Lead free flip-chip
Lead free flip-chip +
back coating
Packaging
Tape & Reel
Marking
A85
May 2005
Rev 2
1/29
www.st.com
29
Typical Application Schematic
TS4985
1
Typical Application Schematic
Figure 1
shows a typical application schematic for the TS4985.
Figure 1.
Application schematic
Cfeed-L
Rfeed-L
22k
VCC
+
Cs
1u
A5
VCC1
VCC2
B6
Input L
GND
Cin-L
100n
VCC
Rin-L
22k
A1
IN-L
-
VO-L
A3
B2
IN+L
+
1
2
3
C5
Standby L
-
Bias
AV = -1
C3
+
VO+L
B4
Bypass
+
Cb
1u
D6
Cin-R
Input R
GND
100n
22k
IN+R
+
Rin-R
E5
IN-R
-
VCC
1
2
3
bs
O
et
l
o
Table 1.
ro
P
e
R
IN L,R
C
IN L,R
R
FEED L,R
C
S
C
B
A
V L, R
uc
d
s)
t(
GND1
GND2
O
-
C1
Standby R
Cfeed-R
Rfeed-R
22k
so
b
-
E1
D2
t
le
P
e
VO-R
E3
VO+R
D4
ro
Neg. Output L
Pos. Output L
uc
d
s)
t(
Neg. Output R
Pos. Output R
AV = -1
+
TS4985
External component descriptions
Functional Description
Components
Inverting input resistors which sets the closed loop gain in
conjunction with Rfeed. These resistors also form a high pass
filter with C
IN
(fc = 1 / (2 x Pi x R
IN
x C
IN
))
Input coupling capacitors which blocks the DC voltage at the
amplifier input terminal
Feedback resistors which sets the closed loop gain in
conjunction with R
IN
Supply Bypass capacitor which provides power supply filtering
Bypass pin capacitor which provides half supply filtering
Closed loop gain in BTL configuration = 2 x (R
FEED
/ R
IN
) on
each channel
2/29
TS4985
Absolute Maximum Ratings
2
Absolute Maximum Ratings
Table 2.
Symbol
VCC
V
i
T
oper
T
stg
T
j
R
thja
Pd
ESD
ESD
Supply voltage
(1)
Input Voltage
(2)
Operating Free Air Temperature Range
Storage Temperature
Maximum Junction Temperature
Flip-chip Thermal Resistance Junction to Ambient
Power Dissipation
Human Body Model
(3)
Machine Model
Latch-up Immunity
1. All voltages values are measured with respect to the ground pin.
Key parameters and their absolute maximum ratings
Parameter
Value
6
G
ND
to V
CC
-40 to + 85
-65 to +150
150
180
Unit
V
V
°C
Internally Limited
2
2. The magnitude of input signal must never exceed V
CC
+ 0.3V / G
ND
- 0.3V
3. All voltage values are measured from each pin with respect to supplies.
Table 3.
Symbol
VCC
V
ICM
Operating conditions
Supply Voltage
O
bs
et
l
o
1.
VSTB
RL
r
P
e
Common Mode Input Voltage Range
Standby Voltage Input:
Device ON
Device OFF
Load Resistor
od
uc
s)
t(
O
-
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b
t
le
P
e
200
ro
uc
d
s)
t(
°C
°C/W
kV
V
mA
°C
200
Parameter
Value
2.2 to 5.5
1.2V to V
CC
1.35
≤
V
STB
≤
V
CC
GND
≤
V
STB
≤
0.4
≥
4
≥
1
150
110
Unit
V
V
V
Ω
MΩ
°C
°C/W
ROUTGND
TSD
RTHJA
Resistor Output to GND (V
STB
= GND)
Thermal Shutdown Temperature
Flip-chip Thermal Resistance Junction to Ambient
(1)
When mounted on a 4-layer PCB.
3/29
Electrical Characteristics
TS4985
3
Electrical Characteristics
Table 4.
Symbol
I
CC
I
STANDBY
Voo
Po
V
CC
= +5V, GND = 0V, T
amb
= 25°C (unless otherwise specified)
Parameter
Supply Current
No input signal, no load
Standby Current
(1)
No input signal, Vstdby = G
ND
, RL = 8Ω
Output Offset Voltage
No input signal, RL = 8Ω
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
0.9
Min.
Typ.
7.4
10
Max.
12
1000
Unit
mA
nA
mV
W
%
1
1.2
0.2
10
Total Harmonic Distortion + Noise
THD + N
Po = 1Wrms, Av = 2, 20Hz
≤
F
≤
20kHz, RL = 8Ω
Power Supply Rejection Ratio
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
(2)
PSRR
Channel Separation, R
L
= 8Ω
Crosstalk
F = 1kHz
F = 20Hz to 20kHz
T
WU
T
STDB
V
STDBH
V
STDBL
Wake-Up Time (Cb = 1µF)
Standby Time (Cb = 1µF)
Standby Voltage Level High
Standby Voltage Level Low
bs
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et
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Φ
M
ro
P
e
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d
s)
t(
O
-
so
b
te
le
ro
P
55
55
uc
d
s)
t(
dB
62
64
-107
-82
90
10
1.3
0.4
65
15
1.5
130
dB
ms
µs
V
V
Degrees
dB
MHz
Phase Margin at Unity Gain
R
L
= 8Ω, C
L
= 500pF
Gain Margin
R
L
= 8Ω, C
L
= 500pF
GM
GBP
Gain Bandwidth Product
R
L
= 8Ω
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sapling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
4/29
TS4985
Table 5.
Symbol
I
CC
I
STANDBY
Voo
Po
THD + N
Electrical Characteristics
V
CC
= +3.3V, GND = 0V, T
amb
= 25°C (unless otherwise specified)
Parameter
Supply Current
No input signal, no load
Standby Current
(1)
No input signal, Vstdby = G
ND
, RL = 8Ω
Output Offset Voltage
No input signal, RL = 8Ω
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 400mWrms, Av = 2, 20Hz
≤
F
≤
20kHz, RL = 8Ω
Power Supply Rejection Ratio
(2)
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
375
Min.
Typ.
6.6
10
Max.
12
1000
Unit
mA
nA
mV
mW
1
500
0.1
10
PSRR
55
55
Channel Separation, R
L
= 8Ω
Crosstalk
F = 1kHz
F = 20Hz to 20kHz
T
WU
T
STDB
V
STDBH
V
STDBL
Φ
M
Wake-Up Time (Cb = 1µF)
Standby Time (Cb = 1µF)
Standby Voltage Level High
Standby Voltage Level Low
GM
bs
O
et
l
o
GBP
od
r
P
e
Phase Margin at Unity Gain
R
L
= 8Ω, C
L
= 500pF
Gain Margin
R
L
= 8Ω, C
L
= 500pF
uc
)-
(s
t
b
O
so
te
le
ro
P
61
63
uc
d
140
s)
t(
%
dB
dB
ms
µs
-107
-82
110
10
1.2
0.4
65
15
1.5
1.5
V
V
Degrees
dB
MHz
MHz
Gain Bandwidth Product
R
L
= 8Ω
GBP
Gain Bandwidth Product
R
L
= 8Ω
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
5/29
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