LS3954A LS3954 LS3955
LS3956 LS3958
Linear Integrated Systems
FEATURES
LOW DRIFT
LOW LEAKAGE
LOW NOISE
|∆V
GS1-2
/∆T|= 5µV/°C max.
I
G
= 20pA TYP.
e
n
= 10nV/√Hz TYP.
LOW NOISE LOW DRIFT
MONOLITHIC DUAL N-CHANNEL JFET
ABSOLUTE MAXIMUM RATINGS NOTE 1
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
G1
-65° to +200°C
+150°C
D1
S1
D1
2
G1
G2
S2
D2
31 X 32 MILS
400mW @ 25°C
BOTTOM VIEW
1
S1
7
G2
6
D2
3
5
S2
Maximum Voltage and Current for Each Transistor NOTE 1
Gate to Drain or Source Voltage
60V
-V
GSS
-V
DSO
-I
G(f)
Drain to Source Voltage
Gate Forward Current
60V
50mA
Maximum Power Dissipation
Device Dissipation @ Free Air - Total
ELECTRICAL CHARACTERISTICS @ 25
°
C (unless otherwise noted)
SYMBOL
CHARACTERISTICS
LS3954A LS3954 LS3955 LS3956 LS3958 UNITS CONDITIONS
5
10
25
50
100
µV/°C
V
DG
= 20V, I
D
= 200µA
|∆V
GS1-2
/∆T| max. Drift vs. Temperature
T
A
= -55°C to +125°C
|V
GS1-2
| max.
SYMBOL
BV
GSS
BV
GGO
Y
fss
Y
fs
|Y
fs1-2
/Y
fs
|
I
DSS
|I
DSS1-2
/I
DSS
|
V
GS
(off) or V
P
V
GS
-I
G
-I
G
-I
G
-I
GSS
Offset Voltage
CHARACTERISTICS
Breakdown Voltage
Gate-to-Gate Breakdown
TRANSCONDUCTANCE
Full Conduction
Typical Operation
Mismatch
DRAIN CURRENT
Full Conduction
Mismatch at Full Conduction
GATE VOLTAGE
Pinchoff Voltage
Operating Range
GATE CURRENT
Operating
High Temperature
Reduced V
DG
At Full Conduction
--
--
--
--
20
--
5
--
50
50
--
100
pA
nA
pA
pA
V
DG
= 20V
V
DG
= 20V
V
DG
= 10V
V
DG
= 20V
I
D
= 200µA
I
D
= 200µA
I
D
= 200µA
V
DS
= 0
T
A
=+125°C
1
0.5
2
--
4.5
4
V
V
V
DS
= 20V
V
DS
= 20V
I
D
= 1nA
I
D
= 200µA
0.5
--
2
1
5
5
mA
%
V
DG
= 20V
V
GS
= 0
1000
500
--
2000
700
0.6
3000
1000
3
µmho
µmho
%
V
DG
= 20V
V
DG
= 20V
V
GS
= 0
I
D
= 200µA
f= 1kHz
5
MIN.
60
60
5
TYP.
--
--
10
MAX.
--
--
15
UNITS
V
V
25
mV
V
DG
= 20V, I
D
= 200µA
CONDITIONS
V
DS
= 0
I
D
= 1µA
I
G
= 1nA
I
D
= 0
I
S
= 0
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261
SYMBOL
Y
OSS
Y
OS
|Y
OS1-2
|
CMR
CMR
NF
e
n
CHARACTERISTICS
OUTPUT CONDUCTANCE
Full Conduction
Operating
Differential
COMMON MODE REJECTION
-20 log |∆V
GS1-2
/∆V
DS
|
-20 log |∆V
GS1-2
/∆V
DS
|
NOISE
Figure
Voltage
CAPACITANCE
Input
Reverse Transfer
Drain-to-Drain
MIN.
--
--
--
--
--
--
--
TYP.
--
0.1
0.01
100
75
--
--
MAX.
5
1
0.1
--
--
0.5
15
UNITS
µmho
µmho
µmho
dB
dB
dB
nV/√Hz
CONDITIONS
V
DG
= 20V
V
DG
= 20V
V
GS
= 0
I
D
= 200µA
∆V
DS
= 10 to 20V
∆V
DS
= 5 to 10V
I
D
= 200µA
I
D
= 200µA
R
G
= 10MΩ
V
DS
= 20V V
GS
= 0
f= 100Hz
NBW= 6Hz
V
DS
= 20V I
D
= 200µA f= 10Hz
NBW= 1Hz
V
DS
= 20V
V
DG
= 20V
V
GS
= 0
f= 1MHz
I
D
= 200µA
C
ISS
C
RSS
C
DD
--
--
--
--
--
0.1
6
2
--
pF
pF
pF
TO-71
Six Lead
0.195
DIA.
0.175
0.030
MAX.
0.230
DIA.
0.209
0.150
0.115
TO-78
0.305
0.335
0.335
0.370
MAX.
0.040 0.165
0.185
MIN. 0.500
SEATING
PLANE
0.200
0.100
P-DIP
0.320
(8.13)
0.290
(7.37)
0.405
(10.29)
MAX.
S1
D1
SS
G1
1
2
3
4
8 G2
7 SS
6 D2
5 S2
0.016
0.019
DIM. A
0.016
0.021
DIM. B
0.029
0.045
2 3 4
1
5
8 7 6
6 LEADS
0.019 DIA.
0.016
0.100
0.500 MIN.
0.050
2 3 4
1
8
5
6
7
SOIC
0.150
(3.81)
0.158
(4.01)
0.100
45°
0.046
0.036
45°
0.048
0.028
0.028
0.034
0.188
(4.78)
0.197
(5.00)
S1
D1
SS
G1
1
2
3
4
8
7
6
5
G2
SS
D2
S2
0.228
(5.79)
0.244
(6.20)
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261
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