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FN4117A

Description
ultra-high input impedance N-channel jfet
CategoryDiscrete semiconductor    The transistor   
File Size11KB,1 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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FN4117A Overview

ultra-high input impedance N-channel jfet

FN4117A Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerLinear ( ADI )
Parts packaging codeTO-72
package instructionCYLINDRICAL, O-MBCY-W4
Contacts4
Reach Compliance Codecompliant
Other featuresULTRA HIGH INPUT IMPEDANCE
ConfigurationSINGLE
FET technologyJUNCTION
Maximum feedback capacitance (Crss)1.5 pF
JEDEC-95 codeTO-72
JESD-30 codeO-MBCY-W4
Number of components1
Number of terminals4
Operating modeDEPLETION MODE
Maximum operating temperature175 °C
Package body materialMETAL
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.3 W
Certification statusNot Qualified
surface mountNO
Terminal formWIRE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
LS4117, 4118, 4119
Linear Integrated Systems
ULTRA-HIGH INPUT IMPEDANCE
N-CHANNEL JFET
FEATURES
LOW POWER
MINIMUM CIRCUIT LOADING
I
DSS
<90
µ
A (2N4117)
I
GSS
<1 pA (2N4117A Series)
D
ABSOLUTE MAXIMUM RATINGS (NOTE 1)
@ 25°C (unless otherwise noted)
Gate-Source or Gate-Drain Voltage
(NOTE 1)
Gate-Current
Total Device Dissipation
(Derate 2mW/°C to 175°C)
Storage Temperature Range
Lead Temperature
(1/16" from case for 10 seconds)
G
2
3
4
Case
G
-40V
50mA
S
D
1
C
S
300mW
-65°C to +175°C
255°C
TO-72
Bottom View
ELECTRICAL CHARACTERISTICS @ 25
°
C (unless otherwise noted)
2N4117/A
2N4118
FN4117/A
2N4118A
SYMBOL
CHARACTERISTICS
MIN MAX MIN
MAX
Gate Reverse Current
--
-10
--
-10
I
GSS
Standard only
--
-25
--
-25
I
GSS
Gate Reverse Current
--
-1
--
-1
BV
GSS
V
GS(off)
I
DSS
g
fs
g
os
C
iss
C
rss
"A" Series only
Gate-Source Breakdown Voltage
Gate-Source Cutoff Voltage
--
-40
-0.6
-2.5
--
-1.8
0.09
210
3
3
1.5
--
-40
-1
0.08
80
--
--
--
-2.5
--
-3
0.24
250
5
3
1.5
2N4119
2N4119A
MIN MAX
--
-10
--
-25
--
-1
--
-40
-2
0.20
100
--
--
--
-2.5
--
-6
0.60
330
10
3
1.5
UNITS
pA
nA
pA
nA
V
mA
CONDITIONS
V
GS
= -20V V
DS
= 0
150°C
V
GS
=-20V V
DS
= 0
150°C
I
G
=-1µA
V
DS
=10V
V
DS
=10V
V
DS
= 0
I
D
= 1nA
V
GS
= 0
Saturation Drain Current
0.03
(NOTE 2)
FN4117/A 0.015
Common-Source Forward
70
Transconductance
(NOTE 2)
Common-Source Output
--
Conductance
Common-Source Input
--
Capacitance
Common-Source Reverse
--
Transfer Capacitance
µmho
f=1kHz
V
DS
= 10V
pF
V
GS
= 0
f=1MHz
NOTES:
1. Due to symmetrical geometry, these units may be operated with source and drain leads interchanged.
2. This parameter is measured during a 2 ms interval 100 ms after power is applied. (Not a JEDEC condition.)
Linear Integrated Systems
4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 • FAX: (510) 353-0261

FN4117A Related Products

FN4117A 2N4118A LS4117 LS4119 LS4118 LS4117-9 2N4119 2N4118
Description ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet ultra-high input impedance N-channel jfet
Is it lead-free? Contains lead Lead free Contains lead Contains lead Contains lead - Contains lead Contains lead
Is it Rohs certified? incompatible conform to incompatible incompatible incompatible - incompatible incompatible
Parts packaging code TO-72 TO-72 TO-72 TO-72 TO-72 - TO-72 TO-72
package instruction CYLINDRICAL, O-MBCY-W4 CYLINDRICAL, O-MBCY-W4 CYLINDRICAL, O-MBCY-W4 CYLINDRICAL, O-MBCY-W4 CYLINDRICAL, O-MBCY-W4 - CYLINDRICAL, O-MBCY-W4 CYLINDRICAL, O-MBCY-W4
Contacts 4 4 4 4 4 - 4 4
Reach Compliance Code compliant compliant compliant compliant compliant - compliant compliant
Other features ULTRA HIGH INPUT IMPEDANCE ULTRA HIGH INPUT IMPEDANCE ULTRA HIGH INPUT IMPEDANCE ULTRA HIGH INPUT IMPEDANCE ULTRA HIGH INPUT IMPEDANCE - ULTRA HIGH INPUT IMPEDANCE ULTRA HIGH INPUT IMPEDANCE
Configuration SINGLE SINGLE SINGLE SINGLE SINGLE - SINGLE SINGLE
FET technology JUNCTION JUNCTION JUNCTION JUNCTION JUNCTION - JUNCTION JUNCTION
Maximum feedback capacitance (Crss) 1.5 pF 1.5 pF 1.5 pF 1.5 pF 1.5 pF - 1.5 pF 1.5 pF
JEDEC-95 code TO-72 TO-72 TO-72 TO-72 TO-72 - TO-72 TO-72
JESD-30 code O-MBCY-W4 O-MBCY-W4 O-MBCY-W4 O-MBCY-W4 O-MBCY-W4 - O-MBCY-W4 O-MBCY-W4
Number of components 1 1 1 1 1 - 1 1
Number of terminals 4 4 4 4 4 - 4 4
Operating mode DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE - DEPLETION MODE DEPLETION MODE
Maximum operating temperature 175 °C 175 °C 175 °C 175 °C 175 °C - 175 °C 175 °C
Package body material METAL METAL METAL METAL METAL - METAL METAL
Package shape ROUND ROUND ROUND ROUND ROUND - ROUND ROUND
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL - CYLINDRICAL CYLINDRICAL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL - N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 0.3 W 0.3 W 0.3 W 0.3 W 0.3 W - 0.3 W 0.3 W
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified
surface mount NO NO NO NO NO - NO NO
Terminal form WIRE WIRE WIRE WIRE WIRE - WIRE WIRE
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM - BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
Transistor component materials SILICON SILICON SILICON SILICON SILICON - SILICON SILICON

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