PPC405GP-3DE200C datasheet, PDF

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PPC405GP-3DE200C: Descriptionpower PC 405gp embedded processor; CategoryThe embedded processor and controller Microcontrollers and processors; File Size787KB，59 Pages; ManufacturerApplied Micro Circuits (MACOM)

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PPC405GP-3DE200C Overview

power PC 405gp embedded processor

PPC405GP-3DE200C Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Applied Micro Circuits (MACOM)
Parts packaging code	BGA
package instruction	BGA, BGA456,26X26,40
Contacts	456
Reach Compliance Code	compliant
ECCN code	3A001.A.3
Other features	ALSO REQUIRES 3.3V SUPPLY
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	66.66 MHz
External data bus width	32
Format	FIXED POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B456
JESD-609 code	e0
length	27 mm
low power mode	YES
Number of terminals	456
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA456,26X26,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5,3.3 V
Certification status	Not Qualified
Maximum seat height	2.65 mm
speed	200 MHz
Maximum supply voltage	2.7 V
Minimum supply voltage	2.3 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	27 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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Part Number 405GP

Revision 2.03 – September 7, 2007

405GP

Power PC 405GP Embedded Processor

Features

• PowerPC

405 32-bit RISC processor core

operating up to 266MHz

• Synchronous DRAM (SDRAM) interface operating

up to 133MHz

- 32-bit interface for non-ECC applications

- 40-bit interface serves 32 bits of data plus 8

check bits for ECC applications

• 4KB on-chip memory (OCM)

• External peripheral bus

- Flash ROM/Boot ROM interface

- Direct support for 8-, 16-, or 32-bit SRAM and

external peripherals

- Up to eight devices

- External Mastering supported

• DMA support for external peripherals, internal

UART and memory

- Scatter-gather chaining supported

- Four channels

Data Sheet

• PCI Revision 2.2 compliant interface (32-bit, up to

66MHz)

- Synchronous or asynchronous PCI Bus

interface

- Internal or external PCI Bus Arbiter

• Ethernet 10/100Mbps (full-duplex) support with

media independent interface (MII)

• Programmable interrupt controller supports seven

external and 19 internal edge triggered or level-

sensitive interrupts

• Programmable timers

• Two serial ports (16550 compatible UART)

• One IIC interface

• General purpose I/O (GPIO) available

• Supports JTAG for board level testing

• Internal processor local Bus (PLB) runs at SDRAM

interface frequency

• Supports PowerPC processor boot from PCI

memory

Description

Designed specifically to address embedded

applications, the PowerPC 405GP (PPC405GP)

provides a high-performance, low-power solution that

interfaces to a wide range of peripherals by

incorporating on-chip power management features

and lower power dissipation requirements.

This chip contains a high-performance RISC

processor core, SDRAM controller, PCI bus interface,

Ethernet interface, control for external ROM and

peripherals, DMA with scatter-gather support, serial

ports, IIC interface, and general purpose I/O.

Technology: CMOS SA-12E, 0.25

μm

(0.18

μm

eff

)

Package: 456-ball (35mm or 27mm), or 413-ball

(25mm) enhanced plastic ball grid array (E-PBGA)

Power (typical): TBDW at 133MHz, 1.5W at 200MHz,

2W at 266MHz

AMCC

405GP – Power PC 405GP Embedded Processor

Revision 2.03 – September 7, 2007

Data Sheet

Contents

Ordering, PVR, and JTAG Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Address Map Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

On-Chip Memory (OCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

PLB to PCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

SDRAM Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

External Peripheral Bus Controller (EBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

IIC Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

General Purpose IO (GPIO) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Universal Interrupt Controller (UIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

10/100 Mbps Ethernet MAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Signal List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Spread Spectrum Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Strapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Tables

System Memory Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

DCR Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signals Listed Alphabetically . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Signals Listed by Ball Assignment—413-Ball Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Signals Listed by Ball Assignment—456-Ball Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Pin Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Signal Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Package Thermal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Clocking Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Peripheral Interface Clock Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

I/O Specifications—All speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

I/O Specifications—133 and 200MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

I/O Specifications—266MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

PPC405GP Strapping Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

AMCC

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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