Data Sheet
SiI3114
PCI to Serial ATA Controller
Data Sheet
Document #
SiI-DS-0103-D
SiI3114
PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
February 2007
Copyright Notice
Copyright © 2007 Silicon Image, Inc. All rights reserved. These materials contain proprietary and confidential
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materials except only for your bona fide non-commercial evaluation of your potential purchase of products
and/services from Silicon Image or its affiliates, and/or only in connection with your purchase of products and/or
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have no right to copy, modify, transfer, sublicense, publicly display, create derivative works of or distribute these
materials, or otherwise make these materials available, in whole or in part, to any third party.
Trademark Acknowledgment
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trademarks or registered trademarks of Silicon Image, Inc. in the United States and other countries. HDMI™, the
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Further Information
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Revision History
Revision
A
A1
A2
A3
A4
Date
09/08/03
10/16/03
10/30/03
02/05/04
04/05/05
Comment
Derived from Preliminary datasheet Rev 0.65.
Updated Table 2-6 SerDes Reference Clock Input Requirements; Updated Table 2-1 Absolute
Maximum Ratings; Corrected inconsistent sentences (minor fixes including mistyping)
Updated Section 8.2 Serial ATA Device Initialization
Corrected part number on cover page to
SiI3114CT176
from
SiI3114CT144
Updated the part number on cover page to
SiI3114
from
SiI3114CT176;
Added Part Ordering
Number in section 4. Package Drawing; Updated Marking Specification in section 4. Package
Drawing
Corrected inconsistent sentences (minor fixes including mistyping); Updated SiI company logo
This datasheet is no longer under NDA. Removed confidential markings
New formatting applied throughout entire document.
B
C
D
07/21/06
11/29/06
02/23/07
© 2007 Silicon Image. Inc.
SiI-DS-0103-D
ii
© 2007 Silicon Image, Inc.
SiI3114
PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Table of Contents
Overview ........................................................................................................................................................ 1
Key Benefits .............................................................................................................................................. 1
Features ..................................................................................................................................................... 1
Overall Features...................................................................................................................................... 1
PCI Features ........................................................................................................................................... 1
Serial ATA Features ................................................................................................................................. 1
Other Features ........................................................................................................................................ 2
Applications............................................................................................................................................... 2
References................................................................................................................................................. 2
Functional Description ............................................................................................................................. 2
PCI Interface .............................................................................................................................................. 2
PCI Initialization ........................................................................................................................................ 2
PCI Bus Operations .................................................................................................................................. 2
PCI Configuration Space .......................................................................................................................... 3
Deviations from the Specification ........................................................................................................... 3
Electrical Characteristics............................................................................................................................. 4
Device Electrical Characteristics ............................................................................................................ 4
SATA Interface Timing Specifications..................................................................................................... 5
SATA Interface Transmitter Output Jitter Characteristics .................................................................... 6
CLKI SerDes Reference Clock Input Requirements.............................................................................. 6
PCI 33 MHz Timing Specifications .......................................................................................................... 6
PCI 66 MHz Timing Specifications .......................................................................................................... 7
Flash Memory Timing Specifications...................................................................................................... 7
Pin Definitions............................................................................................................................................... 8
SiI3114
Pin Listing.................................................................................................................................... 8
SiI3114
Pin Diagram ............................................................................................................................... 13
SiI3114
Pin Descriptions........................................................................................................................ 14
PCI 66MHz 32-bit .................................................................................................................................. 14
Miscellaneous I/O.................................................................................................................................. 16
Serial ATA Signals ................................................................................................................................. 17
Package Drawing........................................................................................................................................ 19
Package Markings ...................................................................................................................................... 20
Block Diagram............................................................................................................................................. 21
Auto-Initialization ....................................................................................................................................... 22
Auto-Initialization from Flash ................................................................................................................ 22
Auto-Initialization from EEPROM .......................................................................................................... 23
Register Definitions.................................................................................................................................... 25
PCI Configuration Space ........................................................................................................................ 25
Device ID – Vendor ID........................................................................................................................... 26
PCI Status – PCI Command.................................................................................................................. 27
PCI Class Code – Revision ID .............................................................................................................. 28
BIST – Header Type – Latency Timer – Cache Line Size..................................................................... 28
Base Address Register 0....................................................................................................................... 29
Base Address Register 1....................................................................................................................... 29
© 2007 Silicon Image, Inc.
iii
SiI-DS-0103-D
SiI3114
PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Base Address Register 2....................................................................................................................... 29
Base Address Register 3....................................................................................................................... 30
Base Address Register 4....................................................................................................................... 30
Base Address Register 5....................................................................................................................... 30
Subsystem ID – Subsystem Vendor ID ................................................................................................. 31
Expansion ROM Base Address ............................................................................................................. 31
Capabilities Pointer ............................................................................................................................... 32
Max Latency – Min Grant – Interrupt Pin – Interrupt Line ..................................................................... 32
Configuration ......................................................................................................................................... 32
Software Data Register ......................................................................................................................... 33
Power Management Capabilities .......................................................................................................... 33
Power Management Control + Status ................................................................................................... 34
PCI Bus Master – Channel 0/2.............................................................................................................. 34
PRD Table Address – Channel 0/2........................................................................................................ 35
PCI Bus Master – Channel 1/3.............................................................................................................. 35
PRD Table Address – Channel 1/3........................................................................................................ 35
Data Transfer Mode – Channel 0/2 ....................................................................................................... 36
Data Transfer Mode – Channel 1/3 ....................................................................................................... 36
System Configuration Status – Command ............................................................................................ 36
System Software Data Register ............................................................................................................ 37
Flash Memory Address – Command + Status....................................................................................... 37
Flash Memory Data ............................................................................................................................... 37
EEPROM Memory Address – Command + Status................................................................................ 38
EEPROM Memory Data ........................................................................................................................ 38
Channel 0/2 Task File Configuration + Status ....................................................................................... 38
Channel 1/3 Task File Configuration + Status ....................................................................................... 39
BA5 Indirect Address............................................................................................................................. 39
BA5 Indirect Access .............................................................................................................................. 39
Internal Register Space – Base Address 0 ........................................................................................... 40
Channel 0/2 Task File Register 0 .......................................................................................................... 40
Channel 0/2 Task File Register 1 .......................................................................................................... 40
Internal Register Space – Base Address 1 ........................................................................................... 41
Channel 0/2 Task File Register 2 .......................................................................................................... 41
Internal Register Space – Base Address 2 ........................................................................................... 42
Channel 1/3 Task File Register 0 .......................................................................................................... 42
Channel 1/3 Task File Register 1 .......................................................................................................... 42
Internal Register Space – Base Address 3 ........................................................................................... 43
Channel 1/3 Task File Register 2 .......................................................................................................... 43
Internal Register Space – Base Address 4 ........................................................................................... 44
PCI Bus Master – Channel 0/2.............................................................................................................. 44
PRD Table Address – Channel 0/2........................................................................................................ 44
PCI Bus Master – Channel 1/3.............................................................................................................. 45
PRD Table Address – Channel 1/3........................................................................................................ 45
Internal Register Space – Base Address 5 ........................................................................................... 46
PCI Bus Master – Channel
X
................................................................................................................ 53
PRD Table Address – Channel
X
.......................................................................................................... 54
PCI Bus Master2 – Channel
X
.............................................................................................................. 54
Summary Interrupt Status...................................................................................................................... 56
PRD Address – Channel
X
.................................................................................................................... 56
PCI Bus Master Byte Count – Channel
X
............................................................................................. 56
FIFO Valid Byte Count and Control – Channel
X
.................................................................................. 57
System Configuration Status – Command ............................................................................................ 57
System Software Data Register ............................................................................................................ 58
Flash Memory Address – Command + Status....................................................................................... 58
Flash Memory Data ............................................................................................................................... 59
EEPROM Memory Address – Command + Status................................................................................ 59
EEPROM Memory Data ........................................................................................................................ 60
SiI-DS-0103-D
iv
© 2007 Silicon Image, Inc.
SiI3114
PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
FIFO Port – Channel
X..........................................................................................................................
60
FIFO Pointers1– Channel
X
.................................................................................................................. 61
FIFO Pointers2– Channel
X
.................................................................................................................. 61
Channel
X
Task File Register 0 ............................................................................................................. 62
Channel
X
Task File Register 1 ............................................................................................................. 62
Channel
X
Task File Register 2 ............................................................................................................. 63
Channel
X
Read Ahead Data ................................................................................................................ 63
Channel
X
Task File Register 0 – Command Buffering......................................................................... 64
Channel
X
Task File Register 1 – Command Buffering......................................................................... 64
Channel
X
Extended Task File Register – Command Buffering ........................................................... 65
Channel
X
Virtual DMA/PIO Read Ahead Byte Count .......................................................................... 65
Channel
X
Task File Configuration + Status.......................................................................................... 65
Data Transfer Mode – Channel
X..........................................................................................................
66
Serial ATA SControl ............................................................................................................................... 67
Serial ATA SStatus................................................................................................................................. 68
Serial ATA SError................................................................................................................................... 69
Serial ATA SActive ................................................................................................................................. 70
SMisc..................................................................................................................................................... 70
Serial ATA PHY Configuration ............................................................................................................... 71
SIEN ...................................................................................................................................................... 72
SFISCfg ................................................................................................................................................. 73
RxFIS0-RxFIS6 ..................................................................................................................................... 73
Programming Sequences .......................................................................................................................... 74
Recommended Initialization Sequence for the
SiI3114......................................................................
74
Serial ATA Device Initialization .............................................................................................................. 75
Issue ATA Command............................................................................................................................... 76
PIO Mode Read/Write Operation............................................................................................................ 76
Watchdog Timer Operation .................................................................................................................... 77
PIO Mode Read Ahead Operation.......................................................................................................... 78
MDMA/UDMA Read/Write Operation ..................................................................................................... 78
Virtual DMA Read/Write Operation........................................................................................................ 79
Using Virtual DMA with Non-DMA Capable Devices............................................................................. 79
Using Virtual DMA with DMA Capable Devices..................................................................................... 81
Second PCI Bus Master Registers Usage ............................................................................................ 82
Power Management.................................................................................................................................... 83
Power Management Summary............................................................................................................... 83
Partial Power Management Mode.......................................................................................................... 83
Slumber Power Management Mode ...................................................................................................... 83
Hot Plug Support .................................................................................................................................... 84
FIS Support ................................................................................................................................................. 85
FIS Summary ........................................................................................................................................... 85
FIS Transmission .................................................................................................................................... 86
FIS Reception .......................................................................................................................................... 86
FIS Types Not Affiliated with Current ATA/ATAPI Operations ............................................................ 89
BIST Support ......................................................................................................................................... 89
BIST Signals.......................................................................................................................................... 89
DMA Setup ............................................................................................................................................ 89
© 2007 Silicon Image, Inc.
v
SiI-DS-0103-D
DSP and ARM Processors
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