SL4503B
Hex Buffer
High-Voltage Silicon-Gate CMOS
The SL4503B is a hex noninverting buffer with 3
-state outputs
having high sink- and source-current capability. Two output ENABLE
controls are provided, one of which controls four buffers and the other
controls the remaining two buffers.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Nois e margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL503BN Plastic
SL4503BD SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Enable 1,Enable 2
L
L
H
PIN 16=V
CC
PIN 8= GND
Z = high impedance
X = don’t care
A
L
H
X
Output
Y
L
H
Z
SLS
System Logic
Semiconductor
SL4503B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
P
D
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±10
750
500
100
-65 to +150
260
Unit
V
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ).
CC
Unused outputs must be left open.
SLS
System Logic
Semiconductor
SL4503B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -Level
Input Voltage
Minimum High-Level
Output Voltage
Maximum Low-Level
Output Voltage
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output Low
(Sink) Current
Test Conditions
V
OUT
= V
CC
- 0.5V
V
OUT
= V
CC
- 1.0 V
V
OUT
= V
CC
- 1.5V
V
OUT
=0.5 V
V
OUT
=1 V
V
OUT
=1.5
V
IN
= V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
18
Guaranteed Limit
≥-55°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
1
2
4
20
2.6
6.5
19.2
-1.2
-5.8
-3.1
-8.2
±0.4
25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
1
2
4
20
2.1
5.5
16.1
-1.02
-4.8
-2.6
-6.8
±0.4
≤125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±1.0
30
60
120
600
1.3
3.8
11.2
mA
-0.7
-3
--1.8
-4.8
±12
µA
Unit
V
V
IL
V
V
OH
V
V
OL
V
IN
=GND
V
I
IN
I
CC
V
IN
= GND or V
CC
V
IN
= GND or V
CC
µA
µA
I
OL
V
IN
= GND or V
CC
U
OL
=0.4 V
U
OL
=0.5 V
U
OL
=1.5 V
mA
I
OH
Minimum Output High V
IN
= GND or V
CC
(Source) Current
U
OH
=2.5 V
U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
Maximum Tree-State
Leakage Current
Output in High-Impedance
State
V
IN
= GND or V
CC
V
OUT
= GND or V
CC
I
OZ
SLS
System Logic
Semiconductor
SL4503B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200kΩ unless otherwise specified, Input
t
r
=t
f
=20 ns)
V
CC
Symbol
t
PLH
Parameter
Maximum Propagation Delay, Input A to Output
Y (Figure 1)
Maximum Propagation Delay, Input A to Output
Y (Figure 1)
Maximum Propagation Delay, Output Enable to
Output Y (Figure 2)
R
L
= 1 kΩ
Maximum Propagation Delay, Output Enable to
Output Y (Figure 2)
R
L
= 1 kΩ
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Input Capacitance
Maximum Tree-State Output Capacitance
(Output in High-Impedance State)
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
-
-
Guaranteed Limit
≥-55°C
150
70
50
110
50
35
140
60
50
180
80
70
90
45
35
70
40
25
25°C
150
70
50
110
50
35
140
60
50
180
80
70
90
45
35
70
40
25
7.5
15
≤125°C
300
140
100
220
100
70
280
120
100
360
160
140
180
90
70
140
80
50
Unit
ns
t
PHL
ns
t
PHZ
, t
PZH
ns
t
PZL
, t
PLZ
ns
t
TLH
ns
t
THL
ns
C
IN
C
OUT
pF
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
SLS
System Logic
Semiconductor
SL4503B
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
SLS
System Logic
Semiconductor
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