IMP8 1 1 , IMP81 2
P
OWER
M
ANAGEMENT
4-Pin µ P Volt ag e Super visor
wit h Manual R eset
The IMP811/IMP812 are low-power supervisors designed to monitor
voltage levels of 3.0V, 3.3V and 5.0V power supplies in low-power
microprocessor (µP), microcontroller (µC) and digital systems. Each fea-
tures a debounced manual reset input. The IMP811/812 are improved
drop-in replacements for the Maxim MAX811/812 with extended
temperature specifications to 105°C.
A reset signal is issued if the power supply voltage drops below a preset
threshold and is asserted for at least 140ms after the supply has risen
above the reset threshold. The IMP811 has an active-low output RESET
that is guaranteed to be in the correct state for V
CC
down to 1.1V. The
IMP812 has an active-high output RESET. The reset comparator is
designed to ignore fast transients on V
CC
.
Low power consumption makes the IMP811/IMP812 ideal for use in
portable and battery-operated equipment. Available in a compact 4-pin
SOT143 package, the devices use minimal board space.
Six voltage thresholds are available to support 3V to 5V systems:
Key Features
x
Improved Maxim MAX811/MAX812 replacement
—
Specified to 105°C
—
New 4.0V threshold option
x
6µA supply current
x
Monitor 5V, 3.3V and 3V supplies
x
Manual reset input
x
140ms min. reset pulse width
x
Guaranteed over temperature
x
Active-LOW reset valid with 1.1V supply
(IMP811)
x
Small 4-pin SOT-143 package
x
No external components
x
Power-supply transient-immune design
Reset Threshold
Suffix
Voltage (V)
L
M
J
T
S
R
4.63
4.38
4.00
3.08
2.93
2.63
Applications
x
x
x
x
x
x
Computers and controllers
Embedded controllers
Battery operated systems
Intelligent instruments
Wireless communication systems
PDAs and handheld equipment
Block Diagrams
VCC
VCC
IMP811
(IMP812)
MR
Manual
Reset
RESET
(RESET)
GND
VCC
µC
or
µP
RESET
Input
GND
811/12_01.eps
IMP, Inc.
San Jose, CA
408-432-9100/www.impweb.com
IMP8 1 1 , IMP81 2
Pin Configuration
SOT143
GND
1
IMP811
(IMP812)
4
V
CC
(RESET) RESET
2
3
MR
811/12_02.eps
Ordering Information
Part Number
1
Reset Threshold (V)
Temperature Range
IMP811 Active LOW Reset with Active LOW Manual Reset
IMP811LEUS-T
IMP811MEUS-T
IMP811JEUS-T
IMP811TEUS-T
IMP811SEUS-T
IMP811REUS-T
IMP812LEUS-T
IMP812MEUS-T
IMP812JEUS-T
IMP812TEUS-T
IMP812SEUS-T
IMP812REUS-T
4.63
4.38
4.00
3.08
2.93
2.63
4.63
4.38
4.00
3.08
2.93
2.63
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
– 40°C to +105°C
Pin-Package
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
4-SOT143
Package Marking
2
(XX Lot Code)
AMXX
ANXX
AOXX
APXX
AQXX
ARXX
ASXX
ATXX
AUXX
AVXX
AWXX
AXXX
IMP812 Active HIGH Reset with Active LOW Manual Reset
Notes:
1. Tape and Reel packaging is indicated by the -T designation.
2. Devices may also be marked with full part number: 811L, 812M etc. XX refers to lot.
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
RESET, R
SET and
R
. . . . . . . . . . . . . . . . . –0.3V to (V
CC
+ 0.3V)
E
M
Input Current at V
CC
and
R
. . . . . . . . . . . 20mA
M
Output Current: RESET orR
SET . . . . . . 20mA
E
Rate of Rise at V
CC
. . . . . . . . . . . . . . . . . . . . 100V/µs
These are stress ratings only and functional operation is not implied.
Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability
2
Power Dissipation (T
A
= 70
°
C) . . . . . . . . . . 320mW
(Derate SOT-143 4mW/°C above 70
°
C)
Operating Temperature Range . . . . . . . . . . –40°C to 105°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to 160°C
Lead Temperature (soldering, 10 sec) . . . . . 300°C
IMP8 1 1 , IMP8 1 2
Electrical Characteristics
Unless otherwise noted V
CC
is over the full voltage range, T
A
= –40°C to 105°C.
Typical values at T
A
= 25°C, V
CC
= 5V for L/M/J devices, V
CC
= 3.3V for T/S devices and V
CC
= 3V for R devices.
Parameter
Input Voltage (V
CC
) Range
Supply Current (Unloaded)
Symbol Conditions
V
CC
I
CC
T
A
= 0°C to 70°C
T
A
= – 40°C to 105°C
T
A
= – 40°C to 85°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 85°C to 105°C
L devices
V
CC
< 5.5V, L/M/J
V
CC
< 3.6V, R/S/T
V
CC
< 5.5V, L/M/J
V
CC
< 3.6V, R/S/T
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= – 40°C to 85°C
T
A
= 85°C to 105°C
Min
1.1
1.2
Typ
6
5
Max
5.5
5.5
15
10
25
20
4.70
4.75
4.86
4.45
4.50
4.56
4.06
4.10
4.20
3.11
3.15
3.23
2.96
3.00
3.08
2.66
2.70
2.76
Units
V
µA
Reset Threshold
V
TH
M devices
J devices
T devices
S devices
R devices
4.56
4.50
4.40
4.31
4.25
4.16
3.93
3.89
3.80
3.04
3.00
2.92
2.89
2.85
2.78
2.59
2.55
2.50
4.63
V
4.38
4.00
3.08
2.93
2.63
Reset Threshold Temp. Coefficient
V
CC
to Reset Delay
Reset Active Timeout Period
MR Minimum Pulse Width
MR Glitch Immunity
MR to RESET Propagation Delay
MR Input Threshold
TC
VTH
V
CC
= V
TH
to (V
TH
- 125mV), L/M/J devices
V
CC
= V
TH
to (V
TH
- 125mV), R/S/T devices
T
A
= 0°C to 70°C
T
A
= – 40°C to 105°C
Note 3
Note 2
V
CC
> V
TH (MAX)
, IMP811/812L/M/J
V
CC
> V
TH (MAX)
, IMP811/812R/S/T
30
40
20
140
100
10
100
0.5
2.3
0.8
0.7V
CC
10
20
0.25V
CC
30
0.3
0.4
0.3
560
840
ppm/°C
µs
ms
µs
ns
µs
V
V
OL
t
MR
t
MD
V
IH
V
IL
V
IH
V
IL
V
OL
MR Pull-up Resistance
Low RESET Output Voltage
(IMP811)
High RESET Output Voltage
(IMP811)
Low RESET Output Voltage
(IMP812)
High RESET Output Voltage
(IMP812)
V
OH
V
OL
V
OH
V
CC
= V
TH
min., I
SINK
= 1.2mA, IMP811R/S/T
V
CC
= V
TH
min., I
SINK
= 3.2mA, IMP811L/M/J
V
CC
> 1.1V, I
SINK
= 50µA
V
CC
> V
TH
max., I
SOURCE
= 500µA, IMP811R/S/T 0.8V
CC
V
CC
> V
TH
max., I
SOURCE
= 800µA, IMP811L/M/J V
CC
-1.5
V
CC
= V
TH
max., I
SINK
= 1.2mA, IMP812R/S/T
V
CC
= V
TH
max., I
SINK
= 3.2mA, IMP812L/M/J
1.8V < V
CC
< V
TH
min., I
SOURCE
= 150µA
0.8V
CC
kΩ
V
V
0.3
0.4
V
V
Notes:
1. Production testing done at T
A
= 25°C. Over temperature specifications guaranteed by design only using six sigma design limits.
2. R
S
E output is active LOW for the IMP811 and RESET output is active HIGH for the IMP812.
E T
3. Glitches of 100ns or less typically will not generate a reset pulse.
3
IMP8 1 1 , IMP81 2
Pin Descriptions
Pin Number
1
2
(IMP811)
2
(IMP812)
3
Name
GND
RESET
Function
Ground
RESET is asserted LOW if V
CC
falls below the reset threshold and remains LOW for the
140ms minimum after the reset conditions are removed. In addition, RESET is active LOW
as long as the manual reset is low.
RESET is asserted HIGH if V
CC
falls below the reset threshold and remains HIGH for the
140ms minimum after the reset conditions are removed. In addition, RESET is active
HIGH as long as the manual reset is low.
Manual Reset Input. A logic LOW on MR asserts RESET. RESET remains active as long
as MR is LOW and for 180ms after MR returns HIGH. The active low input has an internal
20kΩ pull-up resistor. The input should be left open if not used. It can be driven by TTL or
CMOS logic or shorted to ground by a switch..
Power supply input voltage (3.0V, 3.3V, 5.0V)
RESET
MR
4
V
CC
Related Products
IMP809
Max. Supply Current
Package Pins
Manual RESET input
Package Type
Active-HIGH RESET output
Active-LOW RESET output
15µA
3
SOT-23
s
IMP810
15µA
3
SOT-23
s
IMP811
15µA
4
s
SOT-143
s
IMP812
15µA
4
s
SOT-143
s
4
IMP8 1 1 , IMP8 1 2
Detailed Description
Reset Timing and Manual Reset (MR)
The reset signal is asserted–LOW for the IMP811 and HIGH for
the IMP812 – when the V
CC
signal falls below the threshold trip
voltage and remains asserted for 140ms minimum after the V
CC
has risen above the threshold.
A logic low on MR asserts RESET LOW on the IMP811 and HIGH
on the IMP812. MR is internally pulled high through a 20kΩ
resistor and can be driven by TTL/CMOS gates or with open
collector/drain outputs. MR can be left open if not used.
MR may be connected to a normally-open switch connected to
ground without an external debounce circuit.
For added noise rejection, a 0.1µF capacitor from MR to Ground
can be added.
5V
V
CC
0V
V
TH
Active Reset
Timeout Period
140ms
minimum
5V
MR
0V
Active Reset
Timeout Period
5V
RESET
0V
5V
RESET
0V
811/12_03.eps
IMP811
IMP812
Figure 1. Reset Timing and Manual Reset (MR)
5
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