512Kx8 LP SRAM EM6112K800V Series
GENERAL DESCRIPTION
The EM6112K800V is a 4,194,304-bit low power CMOS static random access memory organized as
524,288 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology.
Its standby current is stable within the range of operating temperature.
The EM6112K800V is well designed for low power application, and particularly well suited for battery
back-up nonvolatile memory application.
The EM6112K800V operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time: 45/55/70ns
Low power consumption:
Operating current:
40/30/20mA (TYP.)
Standby current: -L/-LL version
20/2µA (TYP.)
Single 2.7V ~ 3.6V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage: 1.5V (MIN.)
Package:
32-pin 450 mil SOP
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
36-ball 6mm x 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A18
DECODER
512Kx8
MEMORY
ARRAY
DQ0-DQ7
I/O DATA
CURCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
PIN DESCRIPTION
SYMBOL
A0 - A18
DQ0 – DQ7
CE#
WE#
OE#
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
1
DCC-SR-041005-A
512Kx8 LP SRAM EM6112K800V Series
PIN CONFIGURATION
SOP
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
TSOP-I/STSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
A9
A8
A13
WE#
A17
A15
Vcc
A18
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
A3
2
DCC-SR-041005-A
512Kx8 LP SRAM EM6112K800V Series
TFBGA
A
B
C
D
E
F
G
H
A0
DQ4
DQ5
Vss
Vcc
DQ6
DQ7
A9
1
A1
A2
NC
WE#
NC
A3
A4
A5
A6
A7
A8
DQ0
DQ1
Vcc
Vss
DQ2
DQ3
A14
6
OE#
A10
2
A17
CE#
A11
3
A18
A16
A12
4
A15
A13
5
3
DCC-SR-041005-A
512Kx8 LP SRAM EM6112K800V Series
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Terminal Voltage with Respect to Vss
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
SYMBOL
V
TERM
T
A
T
STG
P
D
I
OUT
T
SOLDER
RATING
-0.5 to 4.6
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
260
°C
W
mA
°C
°C
UNIT
V
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device
reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
CE#
H
L
L
L
OE#
X
H
L
X
WE#
X
H
H
L
I/O OPERATION
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB
,I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
Note: H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Input Leakage
Current
Output Leakage
Current
Output High
Voltage
Output Low
Voltage
Average Operating
Power supply
Current
SYMBOL
Vcc
V
IH
*1
V
IL
*2
I
LI
I
LO
V
OH
V
OL
I
CC
I
CC1
Standby Power
Supply Current
I
SB
I
SB1
TEST CONDITION
MIN.
2.7
2.0
-0.2
-1
-1
2.2
-
-45
-55
-70
-
-
-
-
-
-
TYP.
*5
3.0
-
-
-
-
2.7
-
40
30
20
4
0.3
20
2
MAX.
3.6
Vcc+
0.3
0.6
+1
1
-
0.4
50
40
30
5
0.5
80
15
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
µA
µA
Vcc
≧
V
IN
≧
Vss
V
CC
≧
V
OUT
≧
V
SS
,
Output Disabled
I
OH
= -1mA
I
OL
= 2mA
Cycle time = Min.
CE# = V
IL
, I
I/O
= 0mA
Cycle time = 1µs
CE#
≦
0.2V and I
I/O
= 0mA
other pins at 0.2V or V
CC
-0.2V
CE# = V
IH
CE# V
≧
V
CC
- 0.2V
-L
-LL
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. 10µA for special request
5. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25°C
4
DCC-SR-041005-A
512Kx8 LP SRAM EM6112K800V Series
CAPACITANCE
(T
A
= 25°C , f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX.
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
AC ELECTRICAL CHARACTERISTICS
READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
-45
MIN. MAX.
45
-
-
45
-
45
-
25
10
-
5
-
-
15
-
15
10
-
-55
MIN. MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
70
MIN. MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
wr
t
DW
t
DH
t
OW
*
t
WHZ
*
-45
MIN. MAX.
45
-
40
-
40
-
0
-
35
-
0
-
20
-
0
-
5
-
-
15
-55
MIN. MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
20
70
MIN. MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
5
DCC-SR-041005-A
京公网安备 11010802033920号
EEWORLD
