DS1868BE-010-T-R datasheet, PDF

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DS1868BE-010-T-R: DescriptionDigital Potentiometer ICs Inverse-Muxu0027ing Ethernet Mapper; Categorysemiconductor Other integrated circuit (IC); File Size483KB，13 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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Digital Potentiometer ICs Inverse-Muxu0027ing Ethernet Mapper

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Parameter Name	Attribute value
Product Category	Digital Potentiometer ICs
Manufacturer	Maxim
RoHS	Details
Packaging	Reel
Factory Pack Quantity	2500

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FEATURES

www. maximintegrated.com

Two digitally controlled, 256-position

potentiometers

Serial port provides means for setting and

reading both potentiometers

Resistors can be connected in series to

provide increased total resistance

20-pin TSSOP and 16-pin SO packages are

available

Resistive elements are temperature

compensated to

±0.3

LSB relative linearity

Standard resistance values:

- DS1868B-10

~10kW

- DS1868B-50

~50kW

- DS1868B-100

~100kW

+5V or ±3V operation

Operating temperature range:

Industrial: -40°C to +85°C

- Low End of Resistor

- High End of Resistor

- Wiper Terminal of Resistor

- Stacked Configuration Output

- Serial Port Reset Input

- Serial Port Data Input

- Serial Port Clock Input

- Cascade Port Output

- +5 Volt Supply

- Ground Connections

- No Internal Connection

- Substrate Bias Voltage

- Do Not Connect

DS1868B

Dual Digital Potentiometer

PIN ASSIGNMENT

DNC

RST

CLK

DNC

GND

DNC

OUT

DNC

20-Pin TSSOP (173-mil)

RST

CLK

GND

OUT

PIN DESCRIPTION

L0, L1

H0, H1

W0, W1

OUT

CLK

OUT

GND

DNC

RST

DS1868BS 16-Pin SO (300-mil)

PART NO.

DS1868BE-010+

DS1868BE-050+

DS1868BE-100+

DS1868BS-010+

DS1868BS-050+

DS1868BS-100+

PIN-

PACKAGE

20 TSSOP

16 SO

*All GND pins must be connected to ground.

END-TO-END

RESISTANCE

(kΩ)

100

19-6593; Rev 1; 1/14

Maxim Integrated

The DS1868B Dual Digital Potentiometer Chip consists of two digitally controlled solid-state

potentiometers. Each potentiometer is composed of 256 resistive sections. Between each resistive section

and both ends of the potentiometer are tap points which are accessible to the wiper. The position of the

wiper on the resistor array is set by an 8-bit value that controls which tap point is connected to the wiper

output. Communication and control of the device is accomplished via a 3-wire serial port interface. This

interface allows the device wiper position to be read or written.

Both potentiometers can be connected in series (or stacked) for an increased total resistance with the same

resolution. For multiple-device, single-processor environments, the DS1868B can be cascaded or daisy

chained. This feature provides for control of multiple devices over a single 3-wire bus.

The DS1868B is offered in three standard resistance values which include 10kΩ, 50kΩ, and 100kΩ

versions. The part is available in 16-pin SO (300-mil) and 20-pin (173-mil) TSSOP packages.

DESCRIPTION

DS1868B

The DS1868B contains two 256-position potentiometers whose wiper positions are set by an 8-bit value.

These two 8-bit values are written to a 17-bit I/O shift register which is used to store the two wiper

positions and the stack select bit when the device is powered. A block diagram of the DS1868B is

presented in Figure 1.

Communication and control of the DS1868B is accomplished through a 3-wire serial port interface that

drives an internal control logic unit. The 3-wire serial interface consists of the three input signals:

RST

CLK, and DQ.

The

RST

control signal is used to enable the 3-wire serial port operation of the device. The

RST

signal is

an active-high input and is required to begin any communication to the DS1868B. The CLK signal input

is used to provide timing synchronization for data input and output. The DQ signal line is used to transmit

potentiometer wiper settings and the stack select bit configuration to the 17-bit I/O shift register of the

DS1868B.

Figure 9(a) presents the 3-wire serial port protocol. As shown, the 3-wire port is inactive when the

RST

signal input is low. Communication with the DS1868B requires the transition of the

RST

input from a

low state to a high state. Once the 3-wire port has been activated, data is entered into the part on the low

to high transition of the CLK signal inputs. Three-wire serial timing requirements are provided in the

timing diagrams of Figure 9(b),(c).

Data written to the DS1868B over the 3-wire serial interface is stored in the 17-bit I/O shift register (see

Figure 2). The 17-bit I/O shift register contains both 8-bit potentiometer wiper position values and the

stack select bit. The composition of the I/O shift register is presented in Figure 2. Bit 0 of the I/O shift

Configuration. Bits 1 through 8 of the I/O shift register contain the potentiometer-1 wiper position value.

Bit 1 will contain the MSB of the wiper setting for potentiometer-1 and bit 8 the LSB for the wiper

setting. Bits 9 through 16 of the I/O shift register contain the value of the potentiometer-0 wiper position

with the MSB for the wiper position occupying bit 9 and the LSB bit 16.

OPERATION

Maxim Integrated .............................................................................................................................................................................................

DS1868B BLOCK DIAGRAM

Figure 1

DS1868B

I/O SHIFT REGISTER

Figure 2

Transmission of data always begins with the stack select bit followed by the potentiometer-1 wiper

position value and lastly the potentiometer-0 wiper position value.

When wiper position data is to be written to the DS1868B, 17 bits (or some integer multiple) of data

should always be transmitted. Transactions which do not send a complete 17 bits (or multiple) will leave

the register incomplete and possibly an error in the desired wiper positions.

After a communication transaction has been completed the

RST

signal input should be taken to a low

state to prevent any inadvertent changes to the device shift register. Once

RST

has reached a low state,

the contents of the I/O shift register are loaded into the respective multiplexers for setting wiper position.

A new wiper position will only engage after a

RST

transition to the inactive state. On device power-up,

wiper position will be random.

STACKED CONFIGURATION

The potentiometers of the DS1868B can be connected in series as shown in Figure 3. This is referred to as

the stacked configuration and allows the user to double the total end-to-end resistance of the part. The

resolution of the combined potentiometers will remain the same as a single potentiometer but with a total

of 512 wiper positions available. Device resolution is defined as R

TOT

/256 (per potentiometer); where

TOT

equals the total potentiometer resistance.

The wiper output for the combined stacked potentiometer will be taken at the S

OUT

pin, which is the

multiplexed output of the wiper of potentiometer-0 (W0) or potentiometer-1 (W1). The potentiometer

wiper selected at the S

OUT

output is governed by the setting of the stack select bit (bit 0) of the 17-bit I/O

shift register. If the stack select bit has value 0, the multiplexed output, S

OUT

, will be that of the

potentiometer-0 wiper. If the stack select bit has value 1, the multiplexed output, S

OUT

, will be that of the

potentiometer-1 wiper.

STACKED CONFIGURATION

Figure 3

DS1868B

CASCADE OPERATION

A feature of the DS1868B is the ability to control multiple devices from a single processor. Multiple

DS1868Bs can be linked or daisy-chained as shown in Figure 4. As a data bit is entered into the I/O shift

OUT

output after a minimum delay of 50ns. The stack

select bit of the DS1868B will always be the first out of the part at the beginning of a transaction. The

OUT

pin will always have the value of the stack select bit (b0) when

RST

is inactive.

CASCADING MULTIPLE DEVICES

Figure 4

The C

OUT

output of the DS1868B can be used to drive the DQ input of another DS1868B. When

connecting multiple devices, the total number of bits transmitted is always 17 times the number of

DS1868Bs in the daisy chain.

An optional feedback resistor can be placed between the C

OUT

terminal of the last device and the first

DS1868B DQ, input thus allowing the controlling processor to read, as well as, write data, or circularly

clock data through the daisy chain. The value of the feedback or isolation resistor should be in the range

from 2Ω to 10kΩ.

When reading data via the C

OUT

pin and isolation resistor, the DQ line is left floating by the reading

device. When

RST

is driven high, bit 17 is present on the C

OUT

pin, which is fed back to the input DQ pin

through the isolation resistor. When the CLK input transitions low to high, bit 17 is loaded into the first

position of the I/O shift register and bit 16 becomes present on C

OUT

and DQ of the next device. After 17

bits (or 17 times the number of DS1868Bs in the daisy chain), the data has shifted completely around and

back to its original position. When

RST

transitions to the low state to end data transfer, the value (the

same as before the read occurred) is loaded into the wiper-0, wiper-1, and stack select bit I/O register.

DS1868BE-010-T-R Related Products

	DS1868BE-010-T-R	DS1868BS-100-T-R	DS1868BE-050-T-R	DS1868BS-010-T-R	DS1868BS-100-	DS1868BS-050-T-R	DS1868BS-050-	DS1868BE-100-
Description	Digital Potentiometer ICs Inverse-Muxu0027ing Ethernet Mapper	Digital Potentiometer ICs Dual 256-step digital potentiometer, 100k ohm end to end resistance	Digital Potentiometer ICs Dual 256-step digital potentiometer, 50k ohm end to end resistance	Digital Potentiometer ICs Inverse-Muxu0027ing Ethernet Mapper	Standard LEDs - SMD Red Green Blue	Digital Potentiometer ICs Dual 256-step digital potentiometer, 50k ohm end to end resistance	Digital Potentiometer ICs Dual 256-step digital potentiometer, 50k ohm end to end resistance	Multilayer Ceramic Capacitors MLCC - SMD/SMT 100uF 10V X5R +/-20% 1210 HiCV
Product Category	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs	Digital Potentiometer ICs
Manufacturer	Maxim	Maxim	Maxim	Maxim	Maxim	Maxim	Maxim	Maxim
RoHS	Details	Details	Details	Details	Details	Details	Details	Details
Factory Pack Quantity	2500	1000	2500	1000	46	1000	46	74
Packaging	Reel	Reel	Reel	Reel	Tube	Reel	-	-

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