24AA014H/24LC014H
1K I
2
C
™
Serial EEPROM with Half-Array Write-Protect
Device Selection Table
Part
Number
24AA014H
24LC014H
V
CC
Range
1.7V-5.5V
2.5V-5.5V
Max.
Clock
400 kHz
(1)
1 MHz
Temp.
Range
I
I, E
Description:
The Microchip Technology Inc. 24AA014H/24LC014H
is a 1 Kbit Serial Electrically Erasable PROM with
operation down to 1.7V. The device is organized as a
single block of 128 x 8-bit memory with a 2-wire serial
interface. Low-current design permits operation with
maximum standby and active currents of only 1
μA
and
400
μA,
respectively. The device has a page write
capability for up to 16 bytes of data. Functional address
lines allow the connection of up to eight 24AA014H/
24LC014H devices on the same bus for up to 8 Kbits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (150 mil),
TSSOP, 2x3 TDFN and MSOP packages.
Note 1:
100 kHz for V
CC
< 1.8V
Features:
• Single-Supply with Operation down to 1.7V
• Low-Power CMOS Technology:
- 400
μA
active current, maximum
- 1
μA
standby current, maximum (I-temp)
• Organized as a Single Block of 128 Bytes
(128 x 8)
• 2-Wire Serial Interface Bus, I
2
C™ Compatible
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• 1 MHz Compatibility (LC)
• Page Write Buffer for up to 16 Bytes
• Self-Timed Write Cycle (including Auto-Erase)
• Hardware Write Protection for Half Array
(40h-7Fh)
• Address Lines Allow up to Eight Devices on Bus
• 1 Million Erase/Write Cycles
• ESD Protection > 4,000V
• Data Retention > 200 Years
• Factory Programming (QTP) Available
• Pb-Free and RoHS Compliant
• 8-pin PDIP, SOIC, TSSOP, TDFN and MSOP
Packages
• Available for Extended Temperature Ranges:
- Industrial (I):
- Automotive (E):
-40°C to
-40°C to
+85°C
+125°C
Package Types
PDIP, MSOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
A0
A1
A2
SOIC, TSSOP
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
SDA V
SS
TDFN
A0 1
A1 2
A2 3
V
SS
4
8 V
CC
7 WP
6 SCL
5 SDA
Block Diagram
A0 A1 A2
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
SDA SCL
V
CC
V
SS
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
©
2008 Microchip Technology Inc.
Preliminary
DS22077B-page 1
24AA014H/24LC014H
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
......................................................................................................... -0.6V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins
......................................................................................................................................................≥
4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V
Automotive (E): V
CC
= +2.5V to 5.5V
Symbol
V
IH
V
IL
V
HYS
V
OL
I
LI
I
LO
C
IN
, C
OUT
I
CC
Read
I
CC
Write
I
CCS
Min.
0.7 V
CC
—
0.05 V
CC
—
—
—
—
—
—
—
Max.
—
0.3 V
CC
—
0.40
±1
±1
10
400
3
1
Units
V
V
V
V
μΑ
μA
pF
μA
mA
μA
(Note 1)
I
OL
= 3.0 mA, V
CC
= 4.5V
I
OL
= 2.1 mA, V
CC
= 2.5V
V
IN
= V
SS
or V
CC
, WP = Vss
V
OUT
= V
SS
or V
CC
V
CC
= 5.0V
(Note 1)
T
A
= 25°C, f = 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
V
CC
= 5.5V
V
CC
= 5.5V, SDA = SCL = V
CC
WP = V
SS
, A0, A1, A2 = V
SS
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
Conditions
All parameters apply across the
specified operating ranges unless
otherwise noted.
Parameter
SCL and SDA pins:
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt Trigger inputs
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance (all inputs/outputs)
Operating current
Standby current
Note 1:
This parameter is periodically sampled and not 100% tested.
DS22077B-page 2
Preliminary
©
2008 Microchip Technology Inc.
24AA014H/24LC014H
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V
Automotive (E):
V
CC
= +2.5V to 5.5V
Characteristic
Clock frequency
Min.
—
—
—
4000
600
500
4700
1300
500
—
—
—
—
—
—
4000
600
250
4700
600
250
0
250
100
100
4000
600
250
4000
600
600
4700
600
600
—
—
—
1300
4700
4700
—
—
1M
Max.
100
400
1000
—
—
—
—
—
—
1000
300
300
1000
300
300
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
900
400
—
—
—
50
5
—
Units
kHz
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
Conditions
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
(Note 2)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
1.7V
≤
V
CC
< 1.8V
1.8V
≤
V
CC
≤
5.5V
2.5V
≤
V
CC
≤
5.5V (24LC014H)
24AA014H
(Note 1 and Note 3)
—
25°C, V
CC
= 5.5V, Block mode
(Note 4)
AC CHARACTERISTICS
Param.
No.
1
Symbol
F
CLK
2
T
HIGH
Clock high time
ns
3
T
LOW
Clock low time
ns
4
T
R
SDA and SCL rise time
(Note 1)
ns
5
T
F
SDA and SCL fall time
(Note 1)
ns
6
T
HD
:
STA
Start condition hold time
ns
7
T
SU
:
STA
Start condition setup time
ns
8
9
T
HD
:
DAT
T
SU
:
DAT
Data input hold time
Data input setup time
ns
ns
10
T
SU
:
STO
Stop condition setup time
ns
11
T
SU
:
WP
WP setup time
ns
12
T
HD
:
WP
WP hold time
ns
13
T
AA
Output valid from clock
(Note 2)
ns
14
T
BUF
Bus free time: Time the bus must
be free before a new transmission
can start
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
Endurance
ns
16
17
18
T
SP
T
WC
—
ns
ms
cycles
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved noise spike
suppression. This eliminates the need for a T
I
specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
©
2008 Microchip Technology Inc.
Preliminary
DS22077B-page 3
24AA014H/24LC014H
FIGURE 1-1:
BUS TIMING DATA
5
2
D4
4
SCL
SDA
In
7
6
16
3
8
9
10
13
SDA
Out
(protected)
(unprotected)
14
WP
11
12
DS22077B-page 4
Preliminary
©
2008 Microchip Technology Inc.
24AA014H/24LC014H
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
V
SS
SDA
SCL
WP
V
CC
PIN FUNCTION TABLE
8-pin
PDIP
1
2
3
4
5
6
7
8
8-pin
SOIC
1
2
3
4
5
6
7
8
8-pin
TSSOP
1
2
3
4
5
6
7
8
8-pin
MSOP
1
2
3
4
5
6
7
8
8-pin
TDFN
1
2
3
4
5
6
7
8
Function
User Configurable Chip Select
User Configurable Chip Select
User Configurable Chip Select
Ground
Serial Data
Serial Clock
Write-Protect Input
+1.7V to 5.5V (24AA014H)
+2.5V to 5.5V (24LC014H)
2.1
SDA Serial Data
2.4
WP
This is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open drain
terminal. Therefore, the SDA bus requires a pull-up
resistor to V
CC
(typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
WP is the hardware write-protect pin. It must be tied to
V
CC
or V
SS
. If tied to V
CC
, the hardware write protection
is enabled and will protect half of the array (40h-7Fh).
If the WP pin is tied to V
SS
the hardware write
protection is disabled.
2.5
Noise Protection
2.2
SCL Serial Clock
The 24AA014H/24LC014H employs a V
CC
threshold
detector circuit that disables the internal erase/write
logic if the V
CC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits that suppress noise spikes to assure
proper device operation even on a noisy bus.
The SCL input is used to synchronize the data transfer
to and from the device.
2.3
A0, A1, A2
The A0, A1 and A2 inputs are used by the 24AA014H/
24LC014H for multiple device operations. The levels
on these inputs are compared with the corresponding
bits in the slave address. The chip is selected if the
compare is true.
Up to eight 24AA014H/24LC014H devices may be
connected to the same bus by using different Chip
Select bit combinations. These inputs must be
connected to either V
CC
or V
SS
.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
©
2008 Microchip Technology Inc.
Preliminary
DS22077B-page 5
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