Z8523016VEG datasheet, PDF - EEWORLD Datasheet

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Z8523016VEG: CategoryThe embedded processor and controller Microcontrollers and processors; File Size798KB，118 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/; Environmental Compliance

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Z8523016VEG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	unknown
Other features	MODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS; 10 X 19 FRAME STATUS FIFO
Address bus width
boundary scan	NO
Bus compatibility	Z-BUS
maximum clock frequency	16.384 MHz
letter of agreement	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.512 MBps
External data bus width	8
JESD-30 code	S-PQCC-J44
JESD-609 code	e3
length	16.585 mm
low power mode	NO
Humidity sensitivity level	3
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	44
On-chip data RAM width
Maximum operating temperature	100 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.57 mm
Maximum slew rate	15 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	16.585 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches	1

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Z80230/Z85230/L

Enhanced Serial

Communications Controller

Product Specification

PS005308-0609

www.zilog.com

Z80230/Z85230/L

Product Specification

Table of Contents

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Descriptions 1

Pins Common to Both Z85230/L and Z80230 . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin Descriptions Exclusive to the Z85230/L . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin Descriptions Exclusive to the Z80230 . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description 8

Input/Output Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

ESCC Data Communications Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . 15

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230/Z85230/L Enhancements 22

4-Byte Transmit FIFO Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

8-Byte Receive FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Write Register 7 PRIME (WR7’) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

CRC Reception in SDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

TxD Forced High in SDLC with NRZI Encoding When Marking Idle . . . . . . 26

Improved Transmit Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DPLL Counter Tx Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Read Register 0 Status Latched During Read Cycle . . . . . . . . . . . . . . . . . 27

Software Interrupt Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Fast SDLC Transmit Data Interrupt Response . . . . . . . . . . . . . . . . . . . . . . 28

SDLC FIFO Frame Status Enhancement . . . . . . . . . . . . . . . . . . . . . . . . . . 28

FIFO Enable/Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

FIFO Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

FIFO Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

SDLC Status FIFO Anti-Lock Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming 32

Initializing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Write Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Read Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230 Interface Timing 70

Z80230 Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Z80230 Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Z80230 Interrupt Acknowledge Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . 71

Z85230/L Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Z85230/L Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

PS005308-0609

Table of Contents

Z80230/Z85230/L

Product Specification

Z85230/L Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Z85230/L Interrupt Acknowledge Cycle Timing . . . . . . . . . . . . . . . . . . . . . . 74

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics 75

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Z85230/L AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230/Z85230/L Errata 99

IUS Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

IUS Problem Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

RTS Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

RTS Problem Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Automatic TxD Forced High Problem Description . . . . . . . . . . . . . . . . . . . 102

Automatic TxD Forced High Problem Solutions . . . . . . . . . . . . . . . . . . . . 103

SDLC FIFO Overflow Problem Description . . . . . . . . . . . . . . . . . . . . . . . . 103

SDLC FIFO Overflow Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR0 Value Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR0 Value Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR10 Value Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . 104

Default RR10 Value Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

CRC Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

CRC Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Information 105

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Information 107

Z8523L (3.3V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Z85230 (5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Part Number Suffix Designation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

PS005308-0609

Table of Contents

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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