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MC68882EI25A

Description
Microprocessors - MPU MC680X0 FPU COPROCESSOR
Categorysemiconductor    The embedded processor and controller   
File Size4MB,26 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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MC68882EI25A Overview

Microprocessors - MPU MC680X0 FPU COPROCESSOR

MC68882EI25A Parametric

Parameter NameAttribute value
Product CategoryMicroprocessors - MPU
ManufacturerNXP
RoHSDetails
Maximum Operating Temperature+ 70 C
Mounting StyleSMD/SMT
Package / CasePLCC-68
Minimum Operating Temperature0 C
PackagingTube
Factory Pack Quantity18
Unit Weight0.169384 oz
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MOTOROLA
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Freescale Semiconductor, Inc.
Order this document
BR5091D
by
SEMICONDUCTOR
TECHNICAL DATA
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MC68882
Floating-Point
Coprocessor
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The MC68882 floating-point
coprocessor fully implements
the IEEE Standard for Binary Floatin~_+’’,i~’C
Point Arithmetic
(ANSI-IEEE Standard 754-1985) for use with the Motorola M68000 Family of ,,~f@&~i$
processors. An upgrade of the MC68881, it is pin and software compatible with an optimiz$d ~~$~
interface providing in excess of 1.5 times the performance
of the MC68881. It is implem~~~,,
ui;ng
VLSI technology
to give systems designers the highest possible functionality
in a ph~:W&~&mali
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device.
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Intended primarily for use as a coprocessor to the MC68020 or MC68030 32-bi~,~$&@’rocessor
unit (MPU), the MC68882 provides a logical extension to the main MPU integer ~~$~~rocessing
capabilities.
This extension is achieved by providing a very high performan~~oatlng-point
arith-
metic unit and a set of floating-point
data registers which are analogoust$~~t~
&se of the integer
data registers. The MC68882 instruction set is a natural extension of a~j $afi~r members of the
M68000 Family, and it supports all of the addressing modes
of the ~$’~~~.
Due to the flexible
bus interface of the M68000 Family, the MC68882 can be used wj~~ ari~,of the MPU devices of the
M68000 Family and as a peripheral to non-M68000 processors{,{~~ :&+,
.,$>.*), $
. >.
The major features of the MC68882 are:
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Eight general purpose floating-point
data register%!,,,*..l,k*,
?P~M.8’tipporting a full 80-bit extended
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precision real data format (a 64-bit mantissa plus ~~,~~ bit, and a 15-bit signed exponent).
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unit to allow very fast cal$ula~~ons~ with intermediate
precision greater
.3*$;; .
than the extended precision format.
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etc.).
.
A
67-bit barrel shifter for high-speed s~jfl~~b d~erations (for normalizing
o Special purpose hardware for high-#~~&k~”&nversion
of binary real memory operands to and
q
A 67-bit arithmetic
from” the internal
. Reduced
.
.
.
q
extended
forma~J~$,,~#>
to increase throughput.
coprocessor
instructions,
interfac$~~wad
includ~n@~~5Jarith metic operations.
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Full conformation
to the.#~$~}FEE
754 standard, including all requirements
and suggestions,
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Support of functionsA@”%+,@#ned by the IEEE standard, including a full set of trigonometric
and transcendenta~,:t ‘.’:*w, ,:s
f&ct~ns,
.
Seven data
type$$.’b~e,
word and long word
integers; single, double,
~$%
,:+
real number$),$ndp-acked
binary coded decimal string real numbers.
Twenty-t~t~&$,~~tants
available
in the on-chip
ROM, including
Virtual @&@@rY/machine
operations.
and interrupt
handling.
and extended
precision
Forty-six
q
q
q
n, e, and powers
of 10,
Effi~~<#~~eChanisms
for procedure calls, context switches,
. ..f\.
. Q&fiC&~~ent instruction execution with the main processor.
,4*j&QQlurrent
instruction execution of multiple floating-point
instructions.
.‘+:~:,$
,~,
“:%.,use with any host processor, on an 8-, 16-, or 32-bit data bus.
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This document contains information
on a new product. Specifications and information
herein are subject to change without notice.
@MoToRoLA
INC.,
1988
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For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
@
BRW/Rev.
3
-

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