LVDS Interface ICs
35bit LVDS Transmitter
35:5 Serializer
BU8254KVT
No.13057ECT06
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Description
LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits
range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The
ROHM's LVDS has low swing mode to be able to expect further low EMI.
●
Features
1) 35bits data of parallel LVCMOS level inputs are converted to five channels of LVDS data stream.
2) 30bits of RGB data and 5bits of timing and control data(HSYNC,VSYNC,DE,CNTL1,CNTL2) are transmitted up to
784Mbps effective rate per LVDS channel.
3) Support clock frequency from 8MHz up to 112MHz.
4) Support consumer video format including 480i, 480P, 720P and 1080i as well.
5) Clock edge selectable
6) Power down mode
7) Support spread spectrum clock generator.
8) Support reduced swing LVDS for low EMI.
9) 30bit LVDS receiver is recommended to use BU90R104.
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Applications
Flat Panel Display
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Precaution
■This
chip is not designed to protect from radioactivity.
■The
chip is made strictly for the specific application or equipment.
Then it is necessary that the unit is measured as need.
■This
document may be used as strategic technical data which subjects to COCOM regulations.
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
1/17
2013.06 - Rev.C
BU8254KVT
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TQFP64V Package Outline and Specification
Technical Note
Product No.
BU8254KVT
Lot No.
1PIN MARK
Fig.2 TQFP64V Package Outline and Specification
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© 2013 ROHM Co., Ltd. All rights reserved.
3/17
2013.06 - Rev.C
BU8254KVT
●
Pin Description
Technical Note
Table 1 : Pin Description
Pin Name
TAP, TAN
TBP, TBN
TCP, TCN
TDP, TDN
TEP, TEN
TCLKP, TCLKN
TA0½TA6
TB0½TB6
TC0½TC6
TD0½TD6
TE0½TE6
XRST
Pin No.
30,31
28,29
24,25
20,21
18,19
22,23
33,34,35,36,37,38,40
41,42,44,45,46,48,49
50,52,53,54,55,57,58
59,61,62,63,64,1,3
4,5,6,8,9,11,16
13
Type
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
IN
IN
IN
IN
IN
IN
H : Normal operation,
L : Power down (all outputs are Hi-Z)
LVDS swing mode, V
REF
select.
RS
RS
43
IN
V
DD
0.6½1.4V
GND
LVDS Swing
350mV
350mV
200mV
Small Swing
Input Support
N/A
RS-V
REF
N/A
*1
Descriptions
LVDS data out.
LVDS clock out.
Pixel data inputs.
*1 V
REF
is Input Reference Voltage.
RF
VDD
CLKIN
GND
LVDS VDD
LVDS GND
PLLVDD
PLLGND
60
51,7
12
2,10,39,47,56
27
17,26,32
15
14
IN
Power
IN
Ground
Power
Ground
Power
Ground
Input clock triggering edge select.
H : Rising edge, L : Falling edge.
Power supply pins for LVCMOS inputs and digital core.
Clock input.
Ground pins for LVCMOS inputs and digital core.
Power supply pins for LVDS outputs.
Ground pins for LVDS outputs.
Power supply pin for PLL core.
Ground pins for PLL core.
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© 2013 ROHM Co., Ltd. All rights reserved.
5/17
2013.06 - Rev.C
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