E2G0027-17-41
¡ Semiconductor
¡ Semiconductor
MSM514265C/CSL
DESCRIPTION
This
MSM514265C/CSL
version: Jan. 1998
Previous version: May 1997
262,144-Word
¥
16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
The MSM514265C/CSL is a 262,144-word
¥
16-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM514265C/CSL achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/
single-layer metal CMOS process. The MSM514265C/CSL is available in a 40-pin plastic SOJ or 44/
40-pin plastic TSOP. The MSM514265CSL (the self-refresh version) is specially designed for lower-
power applications.
FEATURES
• 262,144-word
¥
16-bit configuration
• Single 5 V power supply,
±10%
tolerance
• Input
: TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 512 cycles/8 ms, 512 cycles/128 ms (SL version)
• Fast page mode with EDO, read modify write capability
•
CAS
before
RAS
refresh, hidden refresh,
RAS-only
refresh capability
•
CAS
before
RAS
self-refresh capability (SL version)
• Package options:
40-pin 400 mil plastic SOJ
(SOJ40-P-400-1.27)
(Product : MSM514265C/CSL-xxJS)
44/40-pin 400 mil plastic TSOP (TSOPII44/40-P-400-0.80-K) (Product : MSM514265C/CSL-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM514265C/CSL-50
MSM514265C/CSL-60
MSM514265C/CSL-70
Access Time (Max.)
t
RAC
t
AA
t
CAC
t
OEA
50 ns 25 ns 15 ns 15 ns
60 ns 30 ns 15 ns 15 ns
70 ns 35 ns 20 ns 20 ns
Power Dissipation
Cycle Time
(Min.)
Operating (Max.) Standby (Max.)
90 ns
110 ns
130 ns
935 mW
825 mW
770 mW
5.5 mW/
1.1 mW (SL version)
1/17
¡ Semiconductor
MSM514265C/CSL
PIN CONFIGURATION (TOP VIEW)
V
CC
1
40
V
SS
DQ1
2
DQ2
3
DQ3
4
DQ4
5
V
CC
6
DQ5
7
DQ6
8
DQ7
9
39
DQ16
38
DQ15
37
DQ14
36
DQ13
35
V
SS
34
DQ12
33
DQ11
32
DQ10
31
DQ9
V
CC
DQ1
DQ2
DQ3
DQ4
V
CC
DQ5
DQ6
DQ7
DQ8
1
2
3
4
5
6
7
8
9
10
44
43
42
41
40
39
38
37
36
35
32
31
30
29
28
27
26
25
24
23
V
SS
DQ16
DQ15
DQ14
DQ13
V
SS
DQ12
DQ11
DQ10
DQ9
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
V
SS
DQ8
10
NC
11
NC
12
WE
13
NC
15
A0
16
A1
17
A2
18
A3
19
RAS
14
NC
NC
30
NC
29
LCAS WE
RAS
28
UCAS
NC
27
OE
A0
26
A8
A1
A2
25
A7
A3
24
A6
V
CC
23
A5
22
A4
21
V
SS
13
14
15
16
17
18
19
20
21
22
V
CC
20
44/40-Pin Plastic TSOP
(K Type)
40-Pin Plastic SOJ
Pin Name
A0 - A8
RAS
LCAS
UCAS
DQ1 - DQ16
OE
WE
V
CC
V
SS
NC
Function
Address Input
Row Address Strobe
Lower Byte Column Address Strobe
Upper Byte Column Address Strobe
Data Input / Data Output
Output Enable
Write Enable
Power Supply (5 V)
Ground (0 V)
No Connection
Note: The same power supply voltage must be provided to every V
CC
pin, and the same GND
voltage level must be provided to every V
SS
pin.
2/17
¡ Semiconductor
MSM514265C/CSL
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
T
I
OS
P
D
*
T
opr
T
stg
Rating
–1.0 to 7.0
50
1
0 to 70
–55 to 150
Unit
V
mA
W
°C
°C
*: Ta = 25°C
Recommended Operating Conditions
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
4.5
0
2.4
–1.0
Typ.
5.0
0
—
—
Max.
5.5
0
6.5
0.8
(Ta = 0°C to 70°C)
Unit
V
V
V
V
Capacitance
Parameter
Input Capacitance (A0 - A8)
Input Capacitance
(RAS,
LCAS, UCAS, WE, OE)
Output Capacitance (DQ1 - DQ16)
Symbol
C
IN1
C
IN2
C
I/O
Typ.
—
—
—
(V
CC
= 5 V ±10%, Ta = 25°C, f = 1 MHz)
Max.
7
7
10
Unit
pF
pF
pF
4/17
¡ Semiconductor
DC Characteristics
MSM514265C/CSL
(V
CC
= 5 V ±10%, Ta = 0°C to 70°C)
Parameter
Output High Voltage
Output Low Voltage
Input Leakage Current
Symbol
Condition
MSM514265 MSM514265 MSM514265
C/CSL-50
C/CSL-60
C/CSL-70 Unit Note
Min.
Max.
V
CC
0.4
10
Min.
2.4
0
–10
Max.
V
CC
0.4
10
Min.
2.4
0
–10
Max.
V
CC
0.4
10
V
V
mA
2.4
0
–10
V
OH
I
OH
= –2.0 mA
V
OL
I
OL
= 2.0 mA
0 V
£
V
I
£
6.5 V;
I
LI
All other pins not
under test = 0 V
DQ disable
0 V
£
V
O
£
5.5 V
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
I
CC2
RAS, CAS
≥
V
CC
–0.2 V
RAS
cycling,
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
DQ = enable
I
CC6
RAS
cycling,
CAS
before
RAS
RAS
= V
IL
,
I
CC7
CAS
cycling,
t
HPC
= Min.
t
RC
= 125
ms,
I
CC10
CAS
before
RAS,
t
RAS
£
1
ms
RAS
£
0.2 V,
CAS
£
0.2 V
Output Leakage Current
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current (Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
Average Power
Supply Current
(Battery Backup)
Average Power
Supply Current
(CAS before
RAS
Self-Refresh)
I
LO
–10
10
–10
10
–10
10
mA
I
CC1
—
—
—
—
—
170
2
1
200
170
—
—
—
—
—
150
2
1
200
150
—
—
—
—
—
140
2
1
200
140
mA 1, 2
mA
mA
1
1, 5
mA 1, 2
—
5
—
5
—
5
mA
1
—
170
—
150
—
140
mA 1, 2
—
170
—
150
—
140
mA 1, 3
—
300
—
300
—
300
mA
1, 4,
5
I
CCS
—
200
—
200
—
200
mA
1, 5
Notes:
1.
2.
3.
4.
5.
I
CC
Max. is specified as I
CC
for output open condition.
The address can be changed once or less while
RAS
= V
IL
.
The address can be changed once or less while
CAS
= V
IH
.
V
CC
– 0.2 V
£
V
IH
£
6.5 V, –1.0 V
£
V
IL
£
0.2 V.
SL version.
5/17
PCB Design
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