NM24C32U 32K-Bit Serial EEPROM with Write Protect 2-Wire Bus Interface
Connection Diagram
Dual-In-Line Package (N)
and 8-Pin SO Package (M8)
A0
A1
A2
VSS
1
2
NM24C32U
3
4
6
5
SCL
SDA
DS800011-2
Pin Names
A0, A1, A2
V
SS
SDA
Device Address Input
Ground
Data I/O
Clock Input
Write Protect
Power Supply
8
7
VCC
WP
SCL
WP
V
CC
Top View
See Package Number N08E and M08A
Ordering Information
NM
24
C
XX
U
F
LZ
E
XX
Package
Temp. Range
Letter
N
M8
None
V
E
Blank
L
LZ
H
Description
8-Pin DIP
8-Pin SOIC
0 to 70°C
-40 to +125°C
-40 to +85°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V and
<1µA Standby Current
4.5V to 5.5V and V
CC
Lockout
100KHz
400KHz
CS100UL Process
32K with Write Protect
CMOS
IIC
Fairchild Non-Volatile
Memory
Voltage Operating Range
SCL Clock Frequency
Blank
F
Ultralite
32
C
24
NM
Density
Interface
2
NM24C32U Rev. C.1
www.fairchildsemi.com
NM24C32U 32K-Bit Serial EEPROM with Write Protect 2-Wire Bus Interface
Product Specifications
Absolute Maximum Ratings
Ambient Storage Temperature
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 seconds)
ESD Rating
–65°C to +150°C
6.5V to –0.3V
+300°C
2000V min.
Operating Conditions
Ambient Operating Temperature
NM24C32U
NM24C32UE
NM24C32UV
Positive Power Supply
NM24C32U/NM24C32UH
NM24C32UL
NM24C32ULZ
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
4.5V to 5.5V
2.7V to 5.5V
2.7V to 5.5V
Standard V
CC
(4.5V to 5.5V) DC Electrical Characteristics
Symbol
Parameter
Test Conditions
Min
I
CCA
I
SB
I
LI
I
LO
V
IL
V
IH
V
OL
Active Power Supply Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
I
OL
= 3 mA
f
SCL
= 400 KHz
f
SCL
= 100 KHz
V
IN
= GND or V
CC
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
Limits
Typ
(Note 1)
0.2
10
0.1
0.1
Units
Max
1.0
50
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
µA
µA
V
V
V
Low V
CC
(2.7V to 5 .5V) DC Electrical Characteristics
Symbol
Parameter
Test Conditions
Min
I
CCA
I
SB
Active Power Supply Current f
SCL
= 400 KHz
f
SCL
= 100 KHz
Standby Current
V
IN
= GND
or V
CC
V
CC
= 2.7V - 4.5V
V
CC
= 2.7V - 4.5V
V
CC
= 4.5V - 5.5V
Limits
Typ
(Note 1)
0.2
1
0.1
10
0.1
0.1
Units
Max
1.0
10
1
50
1
1
V
CC
x 0.3
V
CC
+ 0.5
0.4
mA
µA
µA
µA
µA
µA
V
V
V
I
LI
I
LO
V
IL
V
IH
V
OL
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
V
IN
= GND to V
CC
V
OUT
= GND to V
CC
–0.3
V
CC
x 0.7
I
OL
= 3 mA
Capacitance
T
A
= +25°C, f = 100/400 KHz, V
CC
= 5V
(Note 2)
Symbol
C
I/O
C
IN
Test
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
Conditions
V
I/O
= 0V
V
IN
= 0V
Max
8
6
Units
pF
pF
Note 1:
Typical values are T
A
= 25°C and nominal supply voltage (5V).
Note 2:
This parameter is periodically sampled and not 100% tested.
3
NM24C32U Rev. C.1
www.fairchildsemi.com
NM24C32U 32K-Bit Serial EEPROM with Write Protect 2-Wire Bus Interface
AC Conditions of Test
Input Pulse Levels
Input Rise and Fall Times
Input & Output Timing Levels
Output Load
V
CC
x 0.1 to V
CC
x 0.9
10 ns
V
CC
x 0.5
1 TTL Gate and C
L
= 100 pF
Read and Write Cycle Limits (Standard and Low V
CC
Range - 2.7V-5.5V)
Symbol
f
SCL
T
I
Parameter
SCL Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs (Minimum V
IN
Pulse width)
SCL Low to SDA Data Out Valid
Time the Bus Must Be Free before
a New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
(for a Repeated Start Condition)
Data in Hold Time
Data in Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Write Cycle Time - NM24C32U
- NM24C32UL, NM24C32ULZ
100 KHz
Min
Max
100
100
0.3
4.7
4.0
4.7
4.0
4.7
0
250
1
300
4.7
300
10
15
3.5
400 KHz
Min
Max
400
50
0.1
1.3
0.6
1.5
0.6
0.6
0
100
0.3
300
0.6
50
10
15
0.9
Units
kHz
ns
µs
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
ms
t
AA
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
DH
t
WR
(Note 3)
Note 3:
The write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the
NM24C32U bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address
4
NM24C32U Rev. C.1
www.fairchildsemi.com
NM24C32U 32K-Bit Serial EEPROM with Write Protect 2-Wire Bus Interface
Bus Timing
tF
tHIGH
tLOW
SCL
tLOW
tR
SDA
SDA
OUT
BACKGROUND INFORMATION (IIC Bus)
As mentioned, the IIC bus allows synchronous bidirectional commu-
nication between Transmitter/Receiver using the SCL (clock) and
SDA (Data I/O) lines. All communication must be started with a valid
START condition, concluded with a STOP condition and acknowl-
edged by the Receiver with an ACKNOWLEDGE condition.
In addition, since the IIC bus is designed to support other devices
such as RAM, EPROM, etc., the device type identifier string, or
slave address, must follow the START condition. For EEPROMs,
the first 4-bits of the slave address is '1010'. This is then followed
by the device selection bits A2, A1 and A0.The final bit in the slave
address determines the type of operation performed (READ/
WRITE). A "1" signifies a READ while a "0" signifies a WRITE. The
slave address is then followed by two bytes that define the word
address, which is then followed by the data byte.
The EEPROMs on the IIC bus may be configured in any manner
required, providing the total memory addressed does not exceed
4M bits in the Extended IIC protocol. EEPROM memory address-
ing is controlled by hardware configuring the A2, A1, and A0 pins
(Device Address pins) with pull-up or pull-down resistors. ALL
UNUSED PINS MUST BE GROUNDED (tied to V
SS
).
Addressing an EEPROM memory location involves sending a
command string with the following information:
[DEVICE TYPE]-[DEVICE ADDRESS]-[PAGE BLOCK AD-
DRESS]-[BYTE ADDRESS]
Word
Page
;;
tSU:STA
tHD:STA
IN
tHD:DAT
tSU:DAT
tSU:STO
tBUF
tDH
tAA
DS800011-3
Definitions
8 bits (byte) of data
32 sequential addresses (one byte
each) that may be programmed during
a "Page Write" programming cycle.
Any IIC device CONTROLLING the
transfer of data (such as a microcon-
troller).
Device being controlled (EEPROMS
are always considered Slaves).
Device currently SENDING data on the
bus (may be either a Master or Slave).
Device currently RECEIVING data on
the bus (Master or Slave).
Master
Slave
Transmitter
Receiver
Pin Description
SERIAL CLOCK (SCL)
The SCL input is used to clock all data into and out of the device.
SERIAL DATA (SDA)
SDA is a biderectional pin used to transfer data into and out of the
device. It is an open drain output and may be wire-ORed with any
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