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935292813115

Description
LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, SOT1203, SON-8
Categorylogic    logic   
File Size286KB,23 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

935292813115 Overview

LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, SOT1203, SON-8

935292813115 Parametric

Parameter NameAttribute value
MakerNXP
package instructionVSON,
Reach Compliance Codeunknown
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-N8
JESD-609 codee3
length1.35 mm
Logic integrated circuit typeBUFFER
Number of functions3
Number of entries1
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
propagation delay (tpd)13.1 ns
Maximum seat height0.35 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTIN
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
width1 mm
Base Number Matches1
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 11 — 9 April 2013
Product data sheet
1. General description
The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the
74LVC3G17 as a translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24
mA output drive (V
CC
= 3.0 V)
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Applications
Wave and pulse shapers for highly noisy environments
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