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MAX2986: DescriptionIntegrated Powerline Digital Transceiver; File Size270KB，28 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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MAX2986 Overview

Integrated Powerline Digital Transceiver

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19-3484; Rev 0; 11/04

Integrated Powerline Digital Transceiver

General Description

The MAX2986 powerline transceiver utilizes state-of-the-

art CMOS design techniques to deliver the highest level

of performance and flexibility. This highly integrated

design combines the media access control layer (MAC)

and the physical layer (PHY) in a single chip. The

MAX2986 digital baseband and its companion device,

the MAX2980* analog front-end (AFE), offer a complete

high-speed powerline communication solution that is fully

compatible with third-party HomePlug

1.0 devices.

The MAX2986 digital transceiver utilizes Maxim’s

advanced OFDM powerline engine with adaptive data

rates up to 14Mbps. The MAX2986’s open architecture

allows extensive programmability, feature enhancement

capability, and improved testability in the MAC for opti-

mum performance. Hence, this device is aimed at appli-

cations such as local area networks (LANs), audio,

voice, home automation, industrial automation, and

broadband-over-powerline (BPL), as well as spectral

shaping and tone notching capability, providing an

unparalleled level of flexibility to conform to the disparate

local regulatory bodies. Maxim’s modified OFDM tech-

nique allows shaping of power spectral density of the

transmitted signal arbitrarily to accommodate any

desired subcarrier set and to place spectral nulls at any

unwanted frequency location. The automatic channel

adaptation and interference rejection features of the

MAX2986 guarantee outstanding performance. Privacy

is provided by a 56-bit DES encryption with key manage-

ment.

The MAX2986 operates with IEEE 802.03 standard

media independent interface (MII), reduced media inde-

pendent interface (rMII), buffered FIFO data communica-

tion, IEEE 802.03 compatible 10/100 Ethernet MAC, or

USB 1.1 interfaces. These interfaces allow the MAX2986

to be paired with almost any data communication

devices to use in a variety of information appliances.

♦

Up to 14Mbps Data Rate

♦

4.49MHz to 20.7MHz Frequency Band

♦

Upgradeable/Programmable MAC

Spectral Shaping Including Bandwidth and

Notching Capability

Programmable Preamble

Access to Application Protocol Interface (API)

128kB Internal SRAM

♦

JTAG Interface

♦

Large Bridge Table: Up to 512 Addresses

♦

56-Bit DES Encryption with Key Management for

Secure Communication

♦

Advanced Narrowband Interference Rejection

Circuitry

♦

OFDM-Based PHY

84 Carriers

Automatic Channel Adaptation

FEC (Forward Error Correction)

DQPSK, DBPSK, ROBO

♦

On-Chip Interfaces

10/100 Ethernet

USB 1.1

MII/rMII/FIFO

♦

Compatible with HomePlug 1.0 Standard

Features

♦

Single-Chip Powerline Networking Transceiver

MAX2986

Applications

Broadband-Over-Powerline

Local Area Networks

(LANs)

Multimedia-Over-Powerline

Voice-Over-Powerline

Industrial Automation

(Remote Monitoring and

Control)

Home Automation

Security and Safety

PART

MAX2986CXV

Ordering Information

TEMP RANGE

0°C to +70°C

PIN-PACKAGE

144 CSBGA

*Future

product—contact factory for availability.

HomePlug is a registered trademark of HomePlug Powerline

Alliance, Inc.

Pin Configuration and Typical Application Circuit appear at

end of data sheet.

________________________________________________________________

Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Integrated Powerline Digital Transceiver

Pin Description

BUMP

A1, L2

A2, L3

A3, M1

NAME

PLL Ground

1.8V PLL Analog Power Supply. Bypass to AV

with a 100nF capacitor as close to the pin as

possible.

General-Purpose Input/Output 2. GPIO[2] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[2] if not used. The MAX2986 software uses GPIO[2] to control external

USB circuit.

General-Purpose Input/Output 22. GPIO[22] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[22] if not used. The MAX2986 MAC uses GPIO[22] for AFE interface link

status LED (output) and boot pin bit 1 (input).

FUNCTION

1.8V PLL Digital Power Supply. Bypass to DV

with a 100nF capacitor as close to the pin as possible.

MAX2986

GPIO[2]

GPIO[22]

A6, C1, C13,

F12, J1, L1,

L4, L10, M13

DD33

3.3V Digital Power Supply. Bypass to DGND with a 100nF capacitor as close to the pin as possible.

General-Purpose Input/Output 17. GPIO[17] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[17] if not used.

General-Purpose Input/Output 14. GPIO[14] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[14] if not used.

General-Purpose Input/Output 11. GPIO[11] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[11] if not used. The MAX2986 MAC uses GPIO[11] as processor ID, bit 0

(input).

General-Purpose Input/Output 9. GPIO[9] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[9] if not used. The MAX2986 MAC uses GPIO[9] as serial data in

nonvolatile memory interface.

General-Purpose Input/Output 7. GPIO[7] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[7] if not used. The MAX2986 MAC uses GPIO[7] as AFE interface power-

down signal.

General-Purpose Input/Output 5. GPIO[5] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[5] if not used. The MAX2986 MAC uses GPIO[5] as AFE interface serial

data signal.

General-Purpose Input/Output 4. GPIO[4] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[4] if not used. The MAX2986 MAC uses GPIO[4] for AFE interface serial

clock signal (output) and upper layer interface bit 0 (input).

GPIO[17]

GPIO[14]

GPIO[11]

A10

GPIO[9]

A11

GPIO[7]

A12

GPIO[5]

A13

B1, C2, D4–

D9, E3, E11,

E12, E13, F4,

F13, K5, K6,

K8, K9, M10,

M11, N1, N6

B2, M2

GPIO[4]

DGND

Digital Ground

GPIO[0]

Analog PLL Ground

General-Purpose Input/Output 0. GPIO[0] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[0] if not used.

_______________________________________________________________________________________

Integrated Powerline Digital Transceiver

MAX2986

Pin Description (continued)

BUMP

NAME

GPIO[3]

USBD+

GPIO[21]

FUNCTION

General-Purpose Input/Output 3. GPIO[3] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[3] if not used.

USB Interface Data Signal (+)

General-Purpose Input/Output 21. GPIO[21] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[21] if not used. The MAX2986 MAC uses GPIO[21] for AFE interface

collision LED (output) and boot pin bit 0 (input).

General-Purpose Input/Output 18. GPIO[18] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[18] if not used.

General-Purpose Input/Output 15. GPIO[15] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[15] if not used.

General-Purpose Input/Output 12. GPIO[12] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[12] if not used. The MAX2986 MAC uses GPIO[12] as processor ID, bit 1

(input).

General-Purpose Input/Output 10. GPIO[10] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[10] if not used. The MAX2986 MAC uses GPIO[10] as nonvolatile memory

chip-select signal (output) and nonvolatile memory type, bit 1 (input).

General-Purpose Input/Output 8. GPIO[8] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[8] if not used. The MAX2986 MAC uses GPIO[8] as nonvolatile memory

serial clock signal (output) and nonvolatile memory type, bit 0 (input).

General-Purpose Input/Output 6. GPIO[6] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[6] if not used. The MAX2986 MAC uses GPIO[6] as AFE interface serial

write signal (output) and upper layer interface bit 1 (input).

GPIO[18]

GPIO[15]

GPIO[12]

B10

GPIO[10]

B11

GPIO[8]

B12

GPIO[6]

B13, D1, D11,

D12, D13, E1,

K4, M12

N.C.

No Connection. Must be left unconnected (floating output).

General-Purpose Input/Output 1. GPIO[1] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[1] if not used.

General-Purpose Input/Output 23. GPIO[23] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[23] if not used. The MAX2986 MAC uses GPIO[23] for AFE interface link

activity LED (output) and boot pin bit 2 (input).

USB Interface Data Signal (-)

General-Purpose Input/Output 20. GPIO[20] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[20] if not used.

General-Purpose Input/Output 19. GPIO[19] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[19] if not used.

General-Purpose Input/Output 16. GPIO[16] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[16] if not used.

General-Purpose Input/Output 13. GPIO[13] is in tri-state during boot up. Connect a 100kΩ pullup or

pulldown resistor to GPIO[13] if not used. The MAX2986 MAC uses GPIO[13] as processor ID, bit 2

(input).

GPIO[1]

GPIO[23]

USBD-

GPIO[20]

GPIO[19]

GPIO[16]

GPIO[13]

_______________________________________________________________________________________

MAX2986 Related Products

	MAX2986	MAX2986CXV
Description	Integrated Powerline Digital Transceiver	Integrated Powerline Digital Transceiver

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