Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33882/D
Rev 3.0, 12/2003
Advance Information
Six-Output Low-Side Switch with
SPI and Parallel Input Control
The 33882 is a smart six-output low-side switch able to control system loads
up to 1.0 A. The six outputs can be controlled via both serial peripheral
interface (SPI) and parallel input control, making the device attractive for fault-
tolerant system applications. There are two additional 30 mA low-side
switches with SPI diagnostic reporting (with parallel input control only).
The 33882 is designed to interface directly with industry-standard
microcontrollers via SPI to control both inductive and incandescent loads.
Outputs are configured as open-drain power MOSFETs incorporating internal
dynamic clamping and current limiting. The device has multiple monitoring and
protection features, including low standby current, fault status reporting,
internal 52 V clamp on each output, output-specific diagnostics, and protective
shutdown. In addition, it has a mode select terminal affording a dual means of
input control.
Features
• Outputs Clamped for Switching Inductive Loads
• Very Low Operational Bias Currents (< 2.0 mA)
• CMOS Input Logic Compatible with 5.0 V Logic Levels
• Load Dump Robust (60 V Transient at V
PWR
on OUT0–OUT5)
• Daisy Chain Operation of Multiple Devices Possible
• Switch Outputs Can Be Paralleled for Higher Currents
• R
DS(ON)
of 0.4
Ω
per Output (25°C) at 13 V V
PWR
• SPI Operation Guaranteed to 2.0 MHz
33882
SIX-OUTPUT LOW-SIDE SWITCH
Freescale Semiconductor, Inc...
DH SUFFIX
CASE 979A-09
30-TERMINAL HSOP
FC SUFFIX
CASE 1306-01
32-TERMINAL QFN
ORDERING INFORMATION
Device
MC33882DH/R2
MC33882FC/R2
Temperature
Range (T
A
)
-40°C to 125°C
-40°C to 125°C
Package
30 HSOP
32 QFN
33882 Simplified Application Diagram
Simplified Application Diagram
VDD
VPWR
33882
VPWR
VDD
CS
MCU
SCLK
SI
SO
IN0
IN1
IN2
Optional Parallel
Control of
Outputs 0 through 7
IN3
IN4
IN5
IN6
IN7
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
IN0 & IN1
IN2 & IN3
IN4 & IN5
MODE
GND
Optional Control
of Paired Outputs
Low-Power
LED
Outputs
High-Power
Outputs
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Motorola, Inc. 2003
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1 (V
PWR
)
16 (V
DD
)
33882
2
12 (SI)
DQ
C
On Open
V DD
Detect
Logic
Gate 7
DQ
C
Undervoltage
Shutdown
Internal
Bias
DQ
C
DQ
C
DQ
C
DQ
C
DQ
C
DQ
C
Overvoltage
Shutdown
3 (MODE)
18 (IN7)
Gate 6
Gate 5
Gate 4
Gate 3
Gate 2
Gate 0
30 (OUT6)
26 (OUT5)
23 (OUT4)
20 (OUT3)
10 (OUT2)
7 (OUT1)
5 (OUT0)
52 V
Gate 0
V REF
I LIM
Output Status
1 through 7
Serial Out
+ -
17
(OUT7)
29 (IN6)
OUT6
and OUT7
Unclamped
Low
Power
27 (IN5)
24 (IN4)
28 (IN4 & IN5)
OUT1
to OUT5
High
Power
21 (IN3)
9 (IN2)
19 (IN2 & IN3)
6 (IN1)
Output 0 Status
4 (IN0)
2 (IN0 & IN1)
0
SO Fault Latch/Shift Register
1
2
3
4
5
6
7
Figure 1. 33882 Simplified Internal Block Diagram
- +
GND (Heat Sink)
Freescale Semiconductor, Inc.
Serial In
13 (SCLK)
V DD
OFF/ON
Open
Load
Detect
- +
14 (CS)
Tri-state
Shift
Enable
V OF (th)
3.0 V
3.0 A
Load
Short
Detect
I O(OFF)
40 mA
15 (SO)
MOTOROLA ANALOG
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INTEGRATED CIRCUIT DEVICE DATA
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Note
Terminal numbers shown in this figure are applicable only to the 30-lead HSOP package.
Freescale Semiconductor, Inc.
V
PWR
IN0 & IN1
MODE
IN0
OUT0
IN1
OUT1
NC
IN2
OUT2
NC
SI
SCLK
CS
SO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
HEAT
SINK
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OUT6
IN6
IN4 & IN5
IN5
OUT5
NC
IN4
OUT4
NC
IN3
OUT3
IN2 & IN3
IN7
OUT7
V
DD
Freescale Semiconductor, Inc...
HSOP TERMINAL FUNCTION DESCRIPTION
Terminal
1
2
19
28
Terminal
Name
V
PWR
IN0 & IN1
IN2 & IN3
IN4 & IN5
Formal Name
Load Supply Voltage
Input 0 & Input 1
Input 2 & Input 3
Input 4 & Input 5
Definition
This terminal is connected to battery voltage. A decoupling cap is required from V
PWR
to ground.
These input terminals control two output channels each when the
MODE
terminal is
pulled high. These terminals may be connected to pulse width modulated (PWM)
outputs of the control IC while the
MODE
terminal is high. The states of these terminals
are ignored during normal operation (
MODE
terminal low) and override the normal
inputs (serial or parallel) when the
MODE
terminal is high. These terminals have
internal active 25
µA
pull-downs.
The
MODE
terminal is connected to the
MODE
terminal of the control IC. This terminal
has an internal active 25
µA
pull-up.
These are parallel control input terminals. These terminals have internal 25
µA
active
pull-downs.
3
4
6
9
18
21
24
27
29
5
7
10
17
20
23
26
30
8, 11, 22, 25
12
MODE
Mode Select
Input 0–Input7
IN0
IN1
IN2
IN7
IN3
IN4
IN5
IN6
OUT0
OUT1
OUT2
OUT7
OUT3
OUT4
OUT5
OUT6
NC
SI
Output 0–Output7
Each terminal is one channel's drain, sinking current for the respective load.
No Connect
Serial Input
Not connected.
The Serial Input terminal is connected to the SPI Serial Data Output terminal of the
control IC from where it receives output command data. This input has an internal
active 25
µA
pull-down and requires CMOS logic levels.
The SCLK terminal of the control IC is a bit (shift) clock for the SPI port. It transitions
one time per bit transferred when in operation. It is idle between command transfers. It
is 50% duty cycle, and has CMOS levels.
This terminal is connected to a chip select output of the control IC. This input has an
internal active 25
µA
pull-up and requires CMOS logic levels.
13
SCLK
Serial Clock
14
CS
Chip Select
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
GND
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33882
3
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HSOP TERMINAL FUNCTION DESCRIPTION (continued)
Terminal
15
Terminal
Name
SO
Formal Name
Serial Output
Definition
This terminal is connected to the SPI Serial Data Input terminal of the control IC or to
the SI terminal of the next device in a daisy chain. This output will remain tri-stated
unless the device is selected by a low
CS
terminal or the
MODE
terminal goes low. The
output signal generated will have CMOS logic levels and the output data will transition
on the falling edges of SCLK. The serial output data provides fault information for each
output and is returned MSB first when the device is addressed.
This terminal is connected to the 5.0 V power supply of the system. A decoupling
capacitor is required from V
DD
to ground.
The exposed pad on this package provides the circuit ground connection for this IC.
Ground continuity is required for the outputs to turn on.
16
Heat Sink
(exposed pad)
V
DD
GND
Logic Supply Voltage
Ground
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33882
4
MOTOROLA ANALOG
For More Information On This Product,
INTEGRATED CIRCUIT DEVICE DATA
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IN5
IN4
IN3
32
31
30
29
28
27
26
IN4 & IN5
IN6
OUT6
GND
GND
V
PWR
IN0 & IN1
1
2
3
4
5
6
7
8
25
IN7
24
23
22
21
20
19
18
17
Transparent Top View of Package
IN2 & IN3
OUT5
OUT4
OUT3
OUT7
V
DD
GND
GND
GND
GND
SO
CS
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MODE
10
12
13
14
15
OUT0
OUT1
OUT2
QFN TERMINAL FUNCTION DESCRIPTION
Terminal
7
26
1
Terminal
Name
IN0 & IN1
IN2 & IN3
IN4 & IN5
Formal Name
Input 0 & Input 1
Input 2 & Input 3
Input 4 & Input 5
Definition
These input terminals control two output channels each when the
MODE
terminal is
pulled high. These terminals may be connected to pulse width modulated (PWM)
outputs of the control IC while the
MODE
terminal is high. The states of these terminals
are ignored during normal operation (
MODE
terminal low) and override the normal
inputs (serial or parallel) when the
MODE
terminal is high. These terminals have internal
active 25
µA
pull-downs.
These are parallel input terminals. These terminals have internal 25
µA
active pull-
downs.
2
9
11
13
25
28
30
32
3
10
12
14
24
27
29
31
4, 5, 19–22
6
8
15
IN6
IN0
IN1
IN2
IN7
IN3
IN4
IN5
OUT6
OUT0
OUT1
OUT2
OUT7
OUT3
OUT4
OUT5
GND
V
PWR
MODE
Input 0–Input 7
Output 0–Output 7
Each terminal is one channel's drain, sinking current for the respective load.
Ground
Load Supply Voltage
Mode Select
Serial Input
Ground continuity is required for the outputs to turn on.
This terminal is connected to battery voltage. A decoupling capacitor is required from
V
PWR
to ground.
The
MODE
terminal is connected to the
MODE
terminal of the control IC. This terminal
has an internal active 25
µA
pull-up.
The Serial Input terminal is connected to the SPI Serial Data Output terminal of the
control IC from where it receives output command data. This input has an internal
active 25
µA
pull-down and requires CMOS logic levels.
SI
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
SCLK
IN0
IN1
IN2
SI
16
11
9
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33882
5
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