IS62LV256L-15J datasheet, PDF - EEWORLD Datasheet

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IS62LV256L-15J: Description32K x 8 LOW VOLTAGE CMOS STATIC RAM; File Size34KB，7 Pages; ManufacturerISSI(Integrated Silicon Solution Inc.); Websitehttp://www.issi.com/

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IS62LV256L-15J Overview

32K x 8 LOW VOLTAGE CMOS STATIC RAM

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IS62LV256L

32K x 8 LOW VOLTAGE

CMOS STATIC RAM

FEATURES

• High-speed access time: 15, 20, 25 ns

• Automatic power-down when chip is deselected

• CMOS low power operation

— 255 mW (max.) operating

— 0.18 mW (max.) CMOS standby

• TTL compatible interface levels

• Single 3.3V power supply

• Fully static operation: no clock or refresh

required

• Three-state outputs

ISSI

APRIL 1999

DESCRIPTION

The

ISSI

IS62LV256L is a very high-speed, low power,

32,768-word by 8-bit static RAM. It is fabricated using

ISSI

high-performance CMOS technology. This highly reliable pro-

cess coupled with innovative circuit design techniques, yields

access times as fast as 15 ns maximum.

When

is HIGH (deselected), the device assumes a standby

mode at which the power dissipation is reduced to

µW

(typical) with CMOS input levels.

Easy memory expansion is provided by using an active LOW

Chip Enable (

). The active LOW Write Enable (

) controls

both writing and reading of the memory.

The IS62LV256L is available in the JEDEC standard 28-pin

SOJ and the 450-mil TSOP package.

FUNCTIONAL BLOCK DIAGRAM

A0-A14

DECODER

256 X 1024

MEMORY ARRAY

VCC

GND

I/O

DATA

CIRCUIT

I/O0-I/O7

COLUMN I/O

CONTROL

CIRCUIT

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which

Integrated Silicon Solution, Inc.

SR033-1A

04/27/99

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