AD9245BCPZRL7-40 datasheet, PDF

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AD9245BCPZRL7-40: Description1-Channel Single ADC Pipelined 40Msps 14-bit Parallel 32-Pin LFCSP EP T/R; File Size816KB，32 Pages; ManufacturerADI; Websitehttps://www.analog.com

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AD9245BCPZRL7-40 Overview

1-Channel Single ADC Pipelined 40Msps 14-bit Parallel 32-Pin LFCSP EP T/R

AD9245BCPZRL7-40 Parametric

Parameter Name	Attribute value
EU restricts the use of certain hazardous substances	Compliant
ECCN (US)	3A991.c.3
Part Status	Active
HTS	8542.39.00.01
Converter Type	General Purpose
Architecture	Pipelined
Resolution	14bit
Number of ADCs	1
Number of Input Channels	1
Sampling Rate	40Msps
Digital Interface Type	Parallel
Input Type	Voltage
Input Signal Type	Differential\|Single-Ended
Voltage Reference	Internal\|External
Polarity of Input Voltage	Unipolar
Voltage Supply Source	Single
Input Voltage	1Vp-p/2Vp-p
Minimum Single Supply Voltage (V)	2.7
Typical Single Supply Voltage (V)	3
Maximum Single Supply Voltage (V)	3.6
Maximum Power Dissipation (mW)	414
Integral Nonlinearity Error	±3.4LSB
Full Scale Error	±3.25%FSR
Signal to Noise Ratio	73.5dB(Typ)
No Missing Codes (bit)	14
Sample and Hold	Yes
Single-Ended Input	Yes
Digital Supply Support	No
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	85
Packaging	Tape and Reel
Supplier Temperature Grade	Industrial
Pin Count	32
Standard Package Name	CSP
Supplier Package	LFCSP EP
Mounting	Surface Mount
Package Height	0.73
Package Length	5
Package Width	5
PCB changed	32
Lead Shape	No Lead

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14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS,

3 V A/D Converte

Data Sheet

FEATURES

Single 3 V supply operation (2.7 V to 3.6 V)

SNR = 72.7 dBc to Nyquist

SFDR = 83.0 dBc to Nyquist

Low power

366 mW at 80 MSPS

300 mW at 65 MSPS

165 mW at 40 MSPS

90 mW at 20 MSPS

Differential input with 500 MHz bandwidth

On-chip reference and sample-and-hold

DNL = ±0.5 LSB

Flexible analog input: 1 V p-p to 2 V p-p range

Offset binary or twos complement data format

Clock duty-cycle stabilizer

AVDD

AD9245

FUNCTIONAL BLOCK DIAGRAM

DRVDD

AD9245

VIN+

SHA

VIN–

REFT

REFB

CORRECTION LOGIC

OUTPUT BUFFERS

D13 (MSB)

VREF

D0 (LSB)

SENSE

REF

SELECT

0.5V

CLOCK

DUTY CYCLE

STABILIZER

MODE

SELECT

03583-001

MDAC1

8-STAGE

1 1/2-BIT PIPELINE

A/D

OTR

APPLICATIONS

Medical imaging equipment

IF sampling in communications receivers

WCDMA, CDMA-One, CDMA-2000, and TDS-CDMA

Battery-powered instruments

Hand-held scopemeters

Spectrum analyzers

Power-sensitive military applications

AGND

CLK

PDWN

MODE DGND

Figure 1.

GENERAL DESCRIPTION

The AD9245 is a monolithic, single 3 V supply, 14-bit,

20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital

converter (ADC) featuring a high performance sample-and-

hold amplifier (SHA) and voltage reference. The AD9245 uses a

multistage differential pipelined architecture with output error

correction logic to provide 14-bit accuracy and guarantee no

missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of

user-selectable input ranges and common modes, including

single-ended applications. It is suitable for multiplexed systems

that switch full-scale voltage levels in successive channels and

for sampling single-channel inputs at frequencies well beyond

the Nyquist rate. Combined with power and cost savings over

previously available analog-to-digital converters, the AD9245 is

suitable for applications in communications, imaging, and

medical ultrasound.

A single-ended clock input is used to control all internal con-

version cycles. A duty cycle stabilizer (DCS) compensates for

wide variations in the clock duty cycle while maintaining

excellent overall ADC performance. The digital output data is

presented in straight binary or twos complement formats. An

out-of-range (OTR) signal indicates an overflow condition that

can be used with the most significant bit to determine low or

high overflow. Fabricated on an advanced CMOS process, the

AD9245 is available in a 32-lead LFCSP and is specified over

the industrial temperature range (–40°C to +85°C).

PRODUCT HIGHLIGHTS

1. The AD9245 operates from a single 3 V power supply and

features a separate digital output driver supply to

accommodate 2.5 V and 3.3 V logic families.

2. The patented SHA input maintains excellent performance for

input frequencies up to 100 MHz and can be configured for

single-ended or differential operation.

3. The AD9245 is pin-compatible with the AD9215, AD9235,

and AD9236. This allows a simplified migration from 10 bits

to 14 bits and 20 MSPS to 80 MSPS.

4. The clock DCS maintains overall ADC performance over a

wide range of clock pulse widths.

5. The OTR output bit indicates when the signal is beyond the

selected input range.

Rev. E

Document Feedback

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

AD9245

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DC Specifications ......................................................................... 3

AC Specifications.......................................................................... 5

Digital Specifications ................................................................... 7

Switching Specifications .............................................................. 8

Absolute Maximum Ratings ............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution .................................................................................. 9

Terminology .................................................................................... 10

Pin Configuration and Function Descriptions ........................... 11

Equivalent Circuits ......................................................................... 12

Data Sheet

Typical Performance Characteristics ........................................... 13

Theory of Operation ...................................................................... 18

Analog Input and Reference Overview ................................... 18

Clock Input Considerations ...................................................... 19

Jitter Considerations .................................................................. 20

Power Dissipation and Standby Mode .................................... 20

Digital Outputs ........................................................................... 20

Timing.......................................................................................... 21

Voltage Reference ....................................................................... 21

Internal Reference Connection ................................................ 21

External Reference Operation .................................................. 22

Operational Mode Selection ..................................................... 22

Evaluation Board ........................................................................ 22

Outline Dimensions ....................................................................... 29

Ordering Guide .......................................................................... 29

REVISION HISTORY

5/13—Rev. D to Rev. E

Changed CP-32-2 to CP-32-7 ........................................... Universal

Changes to Figure 3 and Table 9 ................................................... 11

Changes to Figure 40 ...................................................................... 19

Changes to Ordering Guide .......................................................... 29

1/06—Rev. C to Rev. D

Changes to Differential Input Configurations Section and

Figure 40 .......................................................................................... 19

Changes to Internal Reference Connection Section .................. 21

Changes to Figure 49 ...................................................................... 23

Changes to Figure 50 ...................................................................... 24

Changes to Table 12 ........................................................................ 28

Updated Outline Dimensions ....................................................... 29

Changes to Ordering Guide .......................................................... 29

8/05—Rev. B to Rev. C

Updated Format .................................................................. Universal

Changes to Features, Applications, General Description, and

Product Highlights ........................................................................... 1

Added Table 1; Renumbered Sequentially .................................... 3

Changes to Table 2 ............................................................................ 4

Added Table 3; Renumbered Sequentially .................................... 5

Changes to Table 4 ............................................................................ 6

Changes to Table 5.............................................................................7

Changes to Table 6.............................................................................8

Deleted Explanation of Test Levels Table .......................................8

Added Figure 26 to Figure 31; Renumbered Sequentially ........ 16

Added Figure 32 to Figure 37; Renumbered Sequentially ........ 17

Changes to Figure 39...................................................................... 18

Changes to Clock Input Consideration Section ......................... 19

Changes to Figure 44...................................................................... 20

Changes to Table 10 ....................................................................... 21

Changes to Figure 51...................................................................... 25

Changes to Table 12 ....................................................................... 28

Changes to Ordering Guide .......................................................... 29

Updated Outline Dimensions ....................................................... 29

10/03—Rev. A to Rev. B

Changes to Figure 33...................................................................... 17

5/03—Rev. 0 to Rev. A

Changes to Figure 30...................................................................... 15

Changes to Figure 37...................................................................... 19

Changes to Figure 38...................................................................... 20

Changes to Figure 39...................................................................... 21

Changes to Table 10 ....................................................................... 24

Changes to the Ordering Guide ................................................... 25

Rev. E | Page 2 of 32

AD9245BCPZRL7-40 Related Products

	AD9245BCPZRL7-40	AD9245BCPZ-40	AD9245BCPZRL7-20	AD9245BCPZ-65	AD9245BCPZ-20
Description	1-Channel Single ADC Pipelined 40Msps 14-bit Parallel 32-Pin LFCSP EP T/R	1-Channel Single ADC Pipelined 40Msps 14-bit Parallel 32-Pin LFCSP EP Tray	1-Channel Single ADC Pipelined 20Msps 14-bit Parallel 32-Pin LFCSP EP T/R	1-Channel Single ADC Pipelined 65Msps 14-bit Parallel 32-Pin LFCSP EP Tray	1-Channel Single ADC Pipelined 20Msps 14-bit Parallel 32-Pin LFCSP EP Tray
EU restricts the use of certain hazardous substances	Compliant	Compliant	Compliant	Compliant	Compliant
ECCN (US)	3A991.c.3	3A991.c.3	3A991.c.3	3A991c.3.	3A991c.3.
Part Status	Active	Active	Active	Active	Active
HTS	8542.39.00.01	8542.39.00.01	8542.39.00.01	8542.39.00.01	8542.39.00.01
Converter Type	General Purpose	General Purpose	General Purpose	General Purpose	General Purpose
Architecture	Pipelined	Pipelined	Pipelined	Pipelined	Pipelined
Resolution	14bit	14bit	14bit	14bit	14bit
Number of ADCs	1	1	1	1	1
Number of Input Channels	1	1	1	1	1
Sampling Rate	40Msps	40Msps	20Msps	65Msps	20Msps
Digital Interface Type	Parallel	Parallel	Parallel	Parallel	Parallel
Input Type	Voltage	Voltage	Voltage	Voltage	Voltage
Input Signal Type	Differential\|Single-Ended	Single-Ended\|Differential	Single-Ended\|Differential	Single-Ended\|Differential	Single-Ended\|Differential
Voltage Reference	Internal\|External	Internal\|External	External\|Internal	Internal\|External	External\|Internal
Polarity of Input Voltage	Unipolar	Unipolar	Unipolar	Unipolar	Unipolar
Voltage Supply Source	Single	Single	Single	Single	Single
Input Voltage	1Vp-p/2Vp-p	1Vp-p/2Vp-p	1Vp-p/2Vp-p	1Vp-p/2Vp-p	1Vp-p/2Vp-p
Minimum Single Supply Voltage (V)	2.7	2.7	2.7	2.7	2.7
Typical Single Supply Voltage (V)	3	3	3	3	3
Maximum Single Supply Voltage (V)	3.6	3.6	3.6	3.6	3.6
Maximum Power Dissipation (mW)	414	414	414	414	414
Integral Nonlinearity Error	±3.4LSB	±3.4LSB	±3.1LSB	±5.55LSB	±3.1LSB
Full Scale Error	±3.25%FSR	±3.25%FSR	±3.25%FSR	±6.9%FSR	±3.25%FSR
Signal to Noise Ratio	73.5dB(Typ)	73.5dB(Typ)	73.5dB(Typ)	73.1dB(Typ)	73.5dB(Typ)
No Missing Codes (bit)	14	14	14	14	14
Sample and Hold	Yes	Yes	Yes	Yes	Yes
Single-Ended Input	Yes	Yes	Yes	Yes	Yes
Digital Supply Support	No	No	No	No	No
Minimum Operating Temperature (°C)	-40	-40	-40	-40	-40
Maximum Operating Temperature (°C)	85	85	85	85	85
Packaging	Tape and Reel	Tray	Tape and Reel	Tray	Tray
Supplier Temperature Grade	Industrial	Industrial	Industrial	Industrial	Industrial
Pin Count	32	32	32	32	32
Standard Package Name	CSP	CSP	CSP	CSP	CSP
Supplier Package	LFCSP EP	LFCSP EP	LFCSP EP	LFCSP EP	LFCSP EP
Mounting	Surface Mount	Surface Mount	Surface Mount	Surface Mount	Surface Mount
Package Height	0.73	0.73	0.73	0.73	0.73
Package Length	5	5	5	5	5
Package Width	5	5	5	5	5
PCB changed	32	32	32	32	32
Lead Shape	No Lead	No Lead	No Lead	No Lead	No Lead

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