www.fairchildsemi.com
ILC7280
Micropower Dual 150mA CMOS RF LDO™ Regulators
with 75dB Ripple Rejection
Features
•
•
•
•
•
•
•
•
•
•
•
Guaranteed 150mA output per regulator
Ultra low 150mV dropout at 150mA
1% output voltage accuracy
Requires only 0.47µF output capacitor
Only 150µA ground current at 150mA load
60dB ripple rejection at 1kHz (C
OUT
= 0.47µF)
80µV
RMS
noise at BW = 300Hz to 50kHz
Excellent line and load transient response
Over current / over temperature protection
8-pin MSOP package
-60dB cross talk
Description
The ILC7280 is two independent 150mA low dropout (LDO)
voltage regulators in an 8-pin MSOP package. Each regulator
output is independently short circuit protected and has
independent enable lines. The device offers a unique
combination of low dropout voltage and low quiescent
current of CMOS as well as the low noise and high ripple
rejection characteristics of bipolar LDO regulators.
Moreover, only one input capacitor is required.
Dropout Voltage:
Typically 150mV at 150mA load, and
1mV at 1mA load.
Ground Pin Current:
Typically 130µA at 1mA load, and
135µA at 150mA load.
Ripple Rejection:
55dB at 1kHz and 60dB at 100kHz.
Shutdown Mode:
Less than 0.5µA quiescent current in
shutdown mode.
Small Package:
MSOP-8
Small Capacitor:
Requires only a 0.47µF external capacitor
on the regulator output.
Precision Output:
Output voltage trimmed to 1% accuracy.
Output Noise:
80µV
RMS
, optional noise bypass capacitor
at pin 3 will further reduce noise on V
OUTA/B
Voltage Pairings Available:
3.0/3.0V, 3.0/2.8V, 3.0/2.5V,
2.8/2.8V
Preliminary Information
Applications
•
•
•
•
Cellular Phones, pagers and wireless headsets
Palmtops, organizers, PDAs and portable electronics
Battery powered portable appliances and equipment
Remote data accumulation and instrumentation
Typical Applications
V
OUTA
0.47-2.2µF
ceramic
V
OUTB
0.47-2.2µF
ceramic
+
C
NOISE
22pF
(optional)
V
INA
+
GND
+
EN
A
V
INB
+
EN
B
1µF
ceramic
4.7µF
Figure 1: Note: Enable may be connected to V
IN
, C
NOISE
is common to both LDOs
Rev. 1.9
PRELIMINARY INFORMATION
describes products that are in the design stage. Specifications
may change in any manner whatever without notice. Contact Fairchild Semiconductor for
current information.
©2001 Fairchild Semiconductor Corporation
ILC7280
Pin Assignments
V
OUTA
GND
V
OUTB
C
NOISE(optional)
1
2
3
4
8
7
6
5
V
INA
EN
A
V
INB
EN
B
MSOP
(TOP VIEW)
ILC7280CS-XXXX
Pin Definitions ILC7280
Preliminary Information
Pin Number
1
2
Pin Name
V
OUTA
GND
V
OUTB
C
NOISE
(optional)
Regulator Output A
Ground
Regulator Output B
Pin Function Description
3
4
Voltage Reference Bypass: Connect external 22pF capacitor to GND to
minimize output noise in regulator “A” or “B.” May be left open. Do not
ground.
Enable/Shutdown B (input): CMOS compatible input. Logic high =
enable, logic low or open = shutdown. Do not leave floating.
Supply Input B (Internally connected to pin 8)*
Enable/Shutdown A (Input): CMOS compatible input. Logic high =
enable, logic low or open = shutdown. Do not leave floating.
Supply Input A (Internally connected to pin 6)* Galvanic connection only.
5
6
7
8
E
NB
V
INB
E
NA
V
INA
*If maximum current required from each regulator then connect both pin 6 and pin 8 to V
DD
Absolute Maximum Ratings
Parameter
Input Voltage
S/D Input Voltage
Output Current
Output Voltage
Power Dissipation
Maximum Junction Temperature
Storage Temperature
ESD Rating
Operating Input Voltage
Operating Ambient Temperature
Package Thermal Resistance
V
IN
T
A
θ
JA
Symbol
V
IN
V
S/D
I
OUT
V
OUT
P
D
T
J(max)
T
stg
Ratings
-0.3 to +12
-0.3 to V
IN
Short circuit protected
-0.3 to 10
Internally Limited
175
-40~+125
2
2.1 to 8
-40 to +85
200
Unit
V
mA
V
mW
°C
°C
kV
V
°C
°C/W
©2001 Fairchild Semiconductor Corporation
2
ILC7280
Electrical Characteristics ILC7280CS
Unless otherwise specified, all limits are at
A
= 25°C; V
IN
= V
OUT(NOM)
+ 1V, I
OUT
= 1mA, C
OUT
= 0.47µF, V
S/D
= 2V.
The • denotes specifications which apply over the specified operating temperature range. (Note 2)
Parameter
Output Voltage
Output Voltage
Output Voltage
Line Regulation
Dropout Voltage (Note 3)
Symbol
V
OUT
V
OUT
V
OUT
∆V
OUT
/∆V
IN
V
IN
- V
OUT
V
IN
- V
OUT
V
IN
- V
OUT
I
GND
I
GND
I
GND
I
GND
I
GND
I
GND
I
S/D
V
S/D
I
OUT(peak)
e
N
∆V
OUT
/∆V
IN
∆V
OUT(line)
Conditions
I
OUT
= 1mA
1mA < I
OUT
< 100mA
1mA < I
OUT
< 100mA
1mA < I
OUT
< 150mA
1mA < I
OUT
< 150mA
V
OUT(NOM)
+ 1V < V
IN
< 10V
•
I
OUT
= 0mA
•
I
OUT
= 10mA
•
Dropout Voltage (Note 3)
Ground Pin Current
One regulator on
Ground Pin Current
One regulator on
Ground Pin Current
One regulator on
Ground pin Current
Both regulator on
Ground pin Current
Both regulator on
Ground pin Current
Both regulator on
Shutdown Current
Shut Down Input Voltage
Peak Output Current
(Note 4)
Output Noise Voltage
(RMS)
Ripple Rejection
Dynamic Line Regulation
I
OUT
=150mA
•
I
OUT
= 0mA
I
OUT
= 10mA
I
OUT
= 150mA
I
OUT
= 0mA
I
OUT
= 10mA
I
OUT
= 150mA
•
•
•
Min.
-1
-2
-3
Typ.
Max. Units
V
OUT
+1
%V
(Nom.)
(Nom.)
V
OUT
+2
%V
(Nom.)
(Nom.)
V
OUT
+3
%V
(Nom.)
(Nom.)
0.007 0.014 %/V
0.032
0.1
1
mV
2
10
15
mV
20
150
175
mV
200
90
µA
100
135
105
115
150
0.1
2.0
300
500
1
10
0.6
µA
µA
µA
µA
µA
µA
V
mA
µV
60
60
60
10
dB
mV
Preliminary Information
Dropout Voltage (Note 3)
High = Regulator On
Low = Regulator Off
V
OUT
> 0.95V
OUT(NOM)
BW = 300Hz to 50kHz,
C
NOISE
= 0pF
freq = 1kHz
freq = 10kHz
freq = 100kHz
V
IN
: V
OUT(NOM)
+ 1V to
V
OUT(NOM)
+ 2V; dV
IN
/dt =
1V/µS;lo = 150mA
I
OUT
: 0 to 150mA; d(l
OUT
)/dt =
50A/µs, with C
OUT
= 2.2µF
V
OUT
= 0V
Dynamic Load Regulation
Short Circuit Current
∆V
OUT(load)
I
SC
40
20
300
mV
mA
©2001 Fairchild Semiconductor Corporation
3
ILC7280
Notes:
1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical
specifications do not apply when operating the device outside of its rated operating conditions.
2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods.
Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing.
3. Dropout Voltage is defined as the measured Differential Voltage between input and output voltage, when the output voltage
drops 2% below the nominal output voltage as V
IN
is decreased, and approaches V
OUT
. Nominal output voltage is defined at
V
IN
= V
OUT
+ 1V.
4. Guaranteed by design
Preliminary Information
V
INA
V
OUTA
-
+
EN
A
CURRENT LIMIT
THERMAL SHUTDOWN
*C
NOISE
BANDGAP
REF.
GND
CURRENT LIMIT
THERMAL SHUTDOWN
EN
B
+
-
V
INB
*Optional
V
OUTB
©2001 Fairchild Semiconductor Corporation
4
ILC7280
APPLICATIONS INFORMATION
+V
IN
A and B
These pins are connected internally through a galvanic
connection for maximum power from each regulator, both
V
INA
and V
INB
must be connected externally to V
DD
.
Output Capacitor
An output capacitor is required from V
OUTA
and V
OUTB
to
GND to prevent oscillation and minimize the effect of load
transient currents. The minimum size of the output
capacitor(s) is dependent on the usage of C
NOISE
and its
value. Without C
NOISE,
a minimum of 1µF is recommended.
For C
NOISE
= 22pF, a minimum of 2.2µF is recommended
(See figure 1). Larger values of output capacitance will slow
the regulator's response during power up. The upper limit of
capacitance is indefinite, however, it should have an
equivalent series resistance (ESR) of approximately 5Ω or
less and a series resonance above 1MHz. Stability is assured
with the use of a capacitor having ultra-low ESR and as such
will not produce low amplitude oscillations nor an
underdamped transient response. This allows the use of
modern ceramic capacitors in preference to their more costly
Tantalum counterparts.
If the system design calls for smaller load currents, lower
capacitance may be used. Below 10mA the capacitance may
be reduced to 0.47µF and below 1mA to 0.33µF
Enable/Shutdown
Forcing EN
A
and/or EN
B
to a voltage greater than 2V,
enables the regulator(s). These inputs are CMOS logic
compatible gates. If this feature is not required, connect EN
A
and/or EN
B
to V
IN
. Note that V
INA
and V
INB
are connected
internally. To minimize the effect of imbalanced current
sharing and possible noise, both V
INA
and V
INB
should also
be connected externally.
Preliminary Information
Input Capacitor
A 1µF capacitor should be placed from V
INA/B
to GND if
there is more than 10 inches of wire between the input and
the ac filter capacitor or if a battery is used as the input.
Reference Bypass Capacitor
C
NOISE
(the reference voltage bypass capacitor) is connected
to the internal V
REF
which is common to regulator's A and B.
A 22pF capacitor connected between C
NOISE
and GND
decouples the reference output voltage and provides a
significant reduction in regulator output noise. An effect of
C
NOISE
also reduces the regulator phase margin. When using
C
NOISE
, output capacitors of 2.2µF or greater are required to
maintain stability.
Also affected by C
NOISE
is the start up speed of the ICL7280.
The speed is inversely proportional to the value of C
NOISE
. If
a slow or delayed start up time is desired, a larger value of
C
NOISE
is used. Conversely, faster start up times or instant-
on applications will require smaller values of C
NOISE
or its
omission with the pin left open. The trade-off of noise to
response should be considered.
No-Load Stability
The ILC7280 will remain stable and in regulation with no
load current. These are desirable performance features for
applications such as keep-alive modes in CMOS systems.
Split-Supply Operation
When using the ILC7280 in a system requiring that the load
be returned to the negative voltage source, the output(s) must
be diode clamped to inhibit significant voltage excursions
below ground. A simple external diode clamp to ground will
afford protection from damage to the device. (See figure
below).
+V
IN
V
OUTA
or V
OUTB
ILC7280
EN
A
/EN
B
Dual Regulator
Dext
Rload
-V
IN
External Diode, Dext inhibits significant voltage excursions below
ground in a split power supply load return.
©2001 Fairchild Semiconductor Corporation
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