EEWORLDEEWORLDEEWORLD

Part Number

Search

LFSPXO071975Reel

Description
Standard Clock Oscillators 32.7680kHz 1.6 x 1.2 x 0.7mm
CategoryPassive components   
File Size185KB,2 Pages
ManufacturerIQD
Download Datasheet Parametric View All

LFSPXO071975Reel Online Shopping

Suppliers Part Number Price MOQ In stock  
LFSPXO071975Reel - - View Buy Now

LFSPXO071975Reel Overview

Standard Clock Oscillators 32.7680kHz 1.6 x 1.2 x 0.7mm

LFSPXO071975Reel Parametric

Parameter NameAttribute value
Product CategoryStandard Clock Oscillators
ManufacturerIQD
RoHSDetails
ProductStandard Clock Oscillators
Frequency32.768 kHz
Frequency Stability50 PPM
Load Capacitance15 pF
Operating Supply Voltage2.5 V
Output FormatCMOS
Termination StyleSMD/SMT
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length1.6 mm
Width1.2 mm
Height0.7 mm
PackagingReel
Duty Cycle - Max55 %
Factory Pack Quantity3000
TypeCrystal Oscillator
Crystal Clock Oscillator Specification
Part No. + Packaging:
LFSPXO071975Reel
Description
1.6 x 1.2mm crystal oscillator in a ceramic package with a seam
sealed metal lid, hermetically sealed.
Model
IQXO-985
Model Issue number
1
Frequency Parameters
Frequency
Frequency Stability
32.7680kHz
±
50.00ppm
Operating Temperature Range
-40.00 to 85.00°C
Frequency Stability: Includes Frequency Tolerance @ 25°C,
operating temperature range, supply voltage variation and load
variation.
Electrical Parameters
Supply Voltage
Current Draw (typical)
Output Details
2.5V ±10%
0.025mA
Outline (mm)
Output Compatibility
Drive Capability
Rise and Fall Time
Duty Cycle
Output Voltage Levels:
Output Low (VoL): 10%Vs max
Output High (VoH): 90%Vs min
Start Up Time: TBD
Output Control
CMOS
15pF max
200.0ns max
45/55
Stand-by Mode:
Logic '0' (30%Vs max) to pad 1 disables the oscillator output,
the output goes to a high impedance state.
Logic '1' (70%Vs min) or no connection to pad 1 enables
oscillator output.
Stand-by Current: 1.4μA typical 3μA max
Environmental Parameters
Test Circuit
Storage Temperature Range: –40 to 85°C
Compliance
RoHS Status (2011/65/EU)
REACh Status
MSL Rating (JDEC-STD-033):
Packaging Details
Compliant
Compliant
Not Applicable
Pack Style: Reel
Pack Size: 3,000
Tape & reel in accordance with EIA-481-D
Alternative packing option available
Sales Office Contact Details:
UK: +44 (0)1460 270200
Germany: 0800 1808 443
France: 0800 901 383
USA: +1.760.318.2824
Email: info@iqdfrequencyproducts.com
Web: www.iqdfrequencyproducts.com
Page 1 of 2
Printed on 11 Oct 18 12:53 using Part Data Sheet V1.00015
NTSC and PAL camera debugging
I have been debugging cameras recently, both NTSC and PAL. The goal is to clearly display the information collected by the camera on the LCD. The original size of the camera signal is 720*575 and 720*...
雪枫21 Automotive Electronics
Newbie needs help regarding STM32 DA! ! ! !
I want to implement software-triggered DA output. But no matter how I change the input value, the measured output voltage does not change much, and the output cannot be 0v. Please help me... Thanks......
光头 MCU
Help! Urgent! ZStack goes into an infinite loop after serial port triggering! The indicator light on the development board keeps flashing! Urgent!
I just learned zigbee and don’t know how to use zstack message passing, so I blocked the message osal_msg_send in MT_UART.c, and then directly passed the serial port data received in the message struc...
QHYESTY RF/Wirelessly
Please help me write a C program with pictures
The one in the picture is 18b20, but the real thing is not the real thing. It is a temperature and humidity integrated sensor. Please help me urgently! ! !~~~...
摩卡 51mcu
Why does a signal with very little noise introduce high-frequency noise after passing through a first-order active low-pass filter?
Why does a signal with very little noise introduce high-frequency noise after passing through a first-order active low-pass filter? (The signal is input from the left, amplified, and then filtered. Th...
caijianfa55 Analog electronics
Verilog help! !
When I was learning Verilog, I came across an example that I didn't understand. Please help me: The example is as follows: module f1 ( y1, y2, clk, rst); output y1, y2; input clk, rst; reg y1, y2; alw...
ggch Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1957  1120  1132  1944  1803  40  23  37  14  31 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号