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PHY2078QS-BR

Categoryunclassified   
File Size1MB,53 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
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Parameter NameAttribute value
Product CategoryMaxim
ManufacturerMaxim
19-5694; Rev 2/12
A Maxim Integrated Products Brand
PHY2078
Description
The PHY2078 is a combined burst mode laser
driver and limiting amplifier for use within fiber
optic modules for FTTx applications. Used with the
PHY1095 or PHY1097 transimpedance amplifiers
and a low cost serial EEPROM it forms a complete
PON diplexer silicon solution.
The transmit block includes a high frequency
modulator and a bias current generator. The bias
current can be controlled either by a fast settling
APC loop or in open loop mode which uses a
temperature lookup table.
The receiver includes a limiting amplifier with
programmable bandwidth. A Signal Detect/Loss Of
Signal function is implemented using the input
signal modulation amplitude with user selectable
threshold and hysteresis.
Operating with a 3.3V supply and rated from -40 to
+95°C ambient, the PHY2078 is housed in a
32pin, 5x5mm, RoHS compliant, TQFN package.
125Mbps – 2.5Gbps FTTx Burst Mode Laser Driver / Postamplifier
Features
Burst-Mode common anode laser driver with up
to 80mA modulation and 90mA bias current
7ns output switching in Burst Mode
Power saving mode with zero bias and
modulation current between bursts
Closed or open loop bias mode with
temperature lookup table
Temperature compensated modulation current
Limiting amplifier with programmable low pass
filter and output swing
Device settings stored in external 2k EEPROM
Applications
GPON
GEPON
BPON
Level
Detect
EEPROM_SCL
SD/LOS
LOS DAC
VDD_RX
VSS_RX
VSS_RX
RXOUT+
RXOUT-
O/P
LPF
I/P
RXIN+
RXIN-
EEPROM_SDA
VDD_RXO
1
32
TSENSE
VDD_TXO
VSS_TXO
LASER+
LASER-
VSS_TXO
VDD_TXO
VDD_TX
BIAS
BEN+
BEN-
I/P
VSS_RXO
RXOUT-
TXIN+
TXIN-
I/P
Driver
LASER-
LASER+
RXOUT+
SDA
SCL
RREF
32TQFN
TSENSE
TX_DISABLE
TX_FAULT
SCL
SDA
Temperature
Comp
Modulation
DAC
Safety Logic
TXIN+
TX_FAULT
TX_DISABLE
TXIN-
Mean Power
Control Loop
BIAS
VSS_IC
BEN+
BEN-
Internal
Registers &
2-Wire I/F
EEPROM_SCL
EEPROM_SDA
Figure 1 – Block diagram
Figure 2 – Device pin out
PHY2078-RD-1.6
Datasheet
MPD
MPD
SD/LOS
RXIN+
RXIN-
Page 1

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