INTEGRATED CIRCUITS
74F786
4-bit asynchronous bus arbiter
Product specification
IC15 Data Handbook
1991 Feb 14
Philips
Semiconductors
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
FEATURES
•
Arbitrates between 4 asynchronous inputs
•
Separate grant output for each input
•
Common output enable
•
On board 4 input AND gate
•
Metastable–free outputs
•
Industrial temperature range available (–40°C to +85°C)
DESCRIPTION
The 74F786 is an asynchronous 4–bit arbiter designed for high
speed real–time applications. The priority of arbitration is determined
on a first–come first–served basis. Separate bus grant (BGn)
outputs are available to indicate which one of the request inputs is
served by the arbitration logic. All BGn outputs are enabled by a
common enable (EN) pin. In order to generate a bus request signal
a separate 4 input AND gate is provided which may also be used as
an independent AND gate. Unused bus request (BR) inputs may be
disabled by tying them high.
The 74F786 is designed so that contention between two or more
request signals will not glitch or display a metastable condition. In
this situation an increase in the BRn to BGn t
PHL
may be observed.
A typical 74F786 has an h = 6.6ns, t = 0.41ns and To = 5µsec.
Where:
h = Typical propagation delay through the device and t and To are
device parameters derived from test results and can most nearly be
defined as:
t = A function of the rate at which a latch in a metastable state
resolves that condition.
To = A function of the measurement of the propensity of a latch to
enter a metastable state. To is also a very strong function of the
normal propagation delay of the device.
For further information, please refer to the 74F786 application notes.
TYPICAL
SUPPLY CURRENT
(TOTAL)
55mA
TYPE
74F786
TYPICAL
PROPAGATION DELAY
6.6ns
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
16–pin plastic DIP
16–pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F786N
N74F786D
INDUSTRIAL RANGE
V
CC
= 5V
±10%,
T
amb
= –40°C to +85°C
I74F786N
I74F786D
PKG DWG #
SOT 38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
BR0 – BR3
A, B, C, D
EN
YOUT
BG0 – BG3
DESCRIPTION
Bus request inputs (active low)
AND gate inputs
Common bus grant output enable input (active low)
AND gate output
Bus grant outputs (active low)
74F (U.L.) HIGH/
LOW
1.0/3.0
1.0/1.0
1.0/1.0
150/40
150/40
LOAD VALUE HIGH/
LOW
20µA/1.8mA
20µA/0.6mA
20µA/0.6mA
3.0mA/24mA
3.0mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
BUS ARBITER
Φ
74F786
EN
BR0
BR1
BR2
BR3
&
14
BG0
BG1
BG2
BG3
13
12
11
10
4
5
6
7
15
1
2
3
9
4
BR0 BR1 BR2 BR3
A
B
C
D
5
6
6
EN
7
BG0 BG1 BG2 BG3 YOUT
15
1
2
13
12
11
10
14
V
CC
= Pin 16
GND = Pin 8
3
SF00442
SF00443
February 14, 1991
2
853–1269 01717
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
FUNCTIONAL DESCRIPTION
The BRn inputs have no inherent priority. The arbiter assigns priority
to the incoming requests as they are received, therefore, the first BR
asserted will have the highest priority. When a bus request is
received its corresponding bus grant becomes active, provided that
EN is low. If additional bus requests are made during this time they
are queued. When the first request is removed, the arbiter services
the bus request with the next highest priority. Removing a request
while a previous request is being serviced can cause a grant to be
changed when arbitrating between three or four requests. For that
reason, the user should not remove ungranted requests when
arbitrating between three or four requests. This does not apply to
arbitration between two requests.
If two or more BRn inputs are asserted at precisely the same time,
one of them will be selected at random, and all BGn outputs will be
held in the high state until the selection is made. This guarantees
that an erroneous BGn will not be generated even though a
metastable condition may occur internal to the device. When the EN
is in the high state the BGn outputs are forced high.
PIN CONFIGURATION
B 1
C 2
D 3
BR0 4
BR1 5
BR2 6
BR3 7
GND
8
16 V
CC
15
14
13
12
11
10
9
A
YOUT
BG0
BG1
BG2
BG3
EN
SF00441
PIN DESCRIPTION
SYMBOL
BR0 – BR3
A, B, C, D
EN
BG0 – BG3
YOUT
GND
V
CC
PINS
4, 5, 6, 7
15, 1, 2, 3
9
13, 12, 11, 10
14
8
16
TYPE
Input
Input
Input
Output
Output
Ground
Power
NAME
Bus request inputs (active low)
Inputs of the 4–input AND gate
Enable input
Bus grant outputs (active low)
Output of the 4–input AND gate
ground (0V)
Positive supply voltages
When low it enables the BG0 – BG3 outputs.
These outputs indicate the selected bus request. BG0 corre-
sponds to BR0, BG1 to BR1, etc.
FUNCTION
The logic of this device arbitrates between these four inputs.
Unused inputs should be tied high.
February 14, 1991
3
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
ARBITER FUNCTION TABLE
INPUTS
EN
L
L
L
L
BR0
1
X
X
X
BR1
X
1
X
X
BR2
X
X
1
X
X
BR3
X
X
X
1
X
BG0
L
H
H
H
H
BG1
H
L
H
H
H
OUTPUTS
BG2
H
H
L
H
H
BG3
H
H
H
L
H
H
X
X
Notes to mode selection function table
H = High–voltage level
L = Low–voltage level
X = Don’t care
1 = First of inputs to go low
ARBITER FUNCTION TABLE
INPUTS
A
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
B
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
C
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
D
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
OUTPUT
YOUT
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
Notes to AND function table
H = High–voltage level
L = Low–voltage level
February 14, 1991
4
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
LOGIC DIAGRAM
A
B
C
D
BR0
15
1
2
3
4
14
YOUT
13
BR1
5
BG0
BR2
6
12
BG1
BR3
7
11
BG2
10
BG3
V
CC
= Pin 16
GND = Pin 8
EN
SF00444
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
Supply voltage
Input voltage
Input current
Voltage applied to output in high output state
Current applied to output in low output state
Operating free air temperature range
Commercial range
Industrial range
T
stg
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
48
0 to +70
–40 to +85
–65 to +150
UNIT
V
V
mA
V
mA
°
C
°
C
°
C
February 14, 1991
5
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