Product Specification
1000BASE-T RoHS Compliant Copper SFP Transceiver
FCLF8520P2BTL / FCLF8521P2BTL / FCLF8522P2BTL
Product Features
•
•
•
•
•
•
•
•
•
Up to 1.25Gb/s bi-directional data links
Hot-pluggable SFP footprint
Extended case temperature range
(-40°C to +85°C )
Fully metallic enclosure for low EMI
RoHS compliant and Lead Free
Low power dissipation (1.05 W typical)
Compact RJ-45 connector assembly
Access to physical layer IC via 2-wire
serial bus
10/100/1000 BASE-T operation in host
systems with SGMII interface
Applications
•
1.25 Gigabit Ethernet over Cat
5 cable
Finisar’s FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL 1000BASE-T Copper Small
Form Pluggable (SFP) transceivers are based on the SFP Multi Source Agreement (MSA)
1
. They
are compatible with the Gigabit Ethernet and 1000BASE-T standards as specified in IEEE Std
802.3
2
. The transceiver is RoHS compliant and per Directive 2011/65/EU
3
and Finisar Application
Note AN-2038. The 1000BASE-T physical layer IC (PHY) can be accessed via I2C, allowing
access to all PHY settings and features.
The FCLF8520P2BTL uses the SFP’s RX_LOS pin for link indication, and 1000BASE-X auto-
negotiation should be disabled on the host system. The FCLF8521P2BTL is compatible with
1000BASE-X auto-negotiation, but does not have a link indication feature (RX_LOS is internally
grounded). See AN-2036, “Frequently Asked Questions Regarding Finisar’s 1000BASE-T SFPs”,
for a more complete explanation on the differences between the two models and details on
applications issues for the products. The FCLF8522 shall support both RX_LOS pin for link
indication and 1000BASE-X auto-negotiation.
PRODUCT SELECTION
Part Number
FCLF8520P2BTL
FCLF8521P2BTL
Link Indicator on RX_LOS Pin
Yes
No
1000BASE-X auto-negotiation enabled by default
No
Yes
Page 1
Finisar Corporation July 2015 Rev E
FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL Product Specification
FCLF8522P2BTL
Yes
Yes
I.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Notes:
SFP to Host Connector Pin Out
Symbol
Name/Description
Note
V
EET
Transmitter ground (common with receiver ground)
1
T
FAULT
Transmitter Fault. Not supported
T
DIS
Transmitter Disable. PHY disabled on high or open
2
MOD_DEF(2)
Module Definition 2. Data line for serial ID
3
MOD_DEF(1)
Module Definition 1. Clock line for serial ID
3
MOD_DEF(0)
Module Definition 0. Grounded within the module
3
Rate Select
No connection required
LOS
Loss of Signal indication.
4
V
EER
Receiver ground (common with transmitter ground)
1
V
EER
Receiver ground (common with transmitter ground)
1
V
EER
Receiver ground (common with transmitter ground)
1
RD-
Receiver Inverted DATA out. AC coupled
RD+
Receiver Non-inverted DATA out. AC coupled
V
EER
Receiver ground (common with transmitter ground)
1
V
CCR
Receiver power supply
V
CCT
Transmitter power supply
V
EET
Transmitter ground (common with receiver ground)
1
TD+
Transmitter Non-Inverted DATA in. AC coupled
TD-
Transmitter Inverted DATA in. AC coupled
V
EET
Transmitter ground (common with receiver ground)
1
1. Circuit ground is isolated from chassis ground
2. PHY disabled on T
DIS
> 2.0V or open, enabled on T
DIS
< 0.8V
3. Should be pulled up with 4.7k – 10k Ohms on host board to a voltage between 2.0 V and 3.6 V.
MOD_DEF(0) pulls line low to indicate module is plugged in.
4. LVTTL compatible with a maximum voltage of 2.5V. Not supported on FCLF8521P2BTL.
Table 1. SFP to host connector pin assignments and descriptions
VeeT
1
2
3
4
VeeT
TD-
TXFault
TD+
TX Disable
VeeT
MOD-DEF(2)
VccT
20
19
18
17
16
15
14
13
12
11
Towards
Bezel
5
6
7
8
9
10
MOD-DEF(1)
VccR
MOD-DEF(0)
VeeR
Rate Select
RD+
LOS
RD-
VeeR
VeeR
VeeR
Towards
ASIC
Figure 1. Diagram of host board connector block pin numbers and names
Finisar Corporation July 2015 Rev E
Page 2
FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL Product Specification
II.
+3.3V Volt Electrical Power Interface
The FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL have an input voltage range of 3.3 V +/- 5%. The 4 V
maximum voltage is not allowed for continuous operation.
Parameter
Supply Current
Symbol
I
s
Min
Typ
320
Max
375
Units
mA
Input Voltage
Maximum Voltage
Total Maximum Current
including Surge Current
Hot plug above steady state
current. See caution note
below
Caution: Power consumption and surge current are higher than the specific values in the SFP MSA
Table 2, +3.3 Volt electrical power interface
V
cc
V
max
I
surge
3.13
3.3
3.47
4
405
V
V
mA
Notes/Conditions
1.2W max power over
full range of voltage
and temperature.
See caution note below
Referenced to GND
III. Low-Speed Signals
MOD_DEF(1) (SCL) and MOD_DEF(2) (SDA), are open drain CMOS signals (see section VII, “Serial
Communication Protocol”). Both MOD_DEF(1) and MOD_DEF(2) must be pulled up to host_Vcc.
Parameter
SFP Output LOW
Symbol
V
OL
SFP Output HIGH
V
OH
SFP Input LOW
V
IL
SFP Input HIGH
V
IH
Notes/Conditions
4.7k to 10k pull-up to host_Vcc,
measured at host side of
connector
host_Vcc -
host_Vcc +
V
4.7k to 10k pull-up to host_Vcc,
0.5
0.3
measured at host side of
connector
0
0.8
V
4.7k to 10k pull-up to Vcc,
measured at SFP side of
connector
2
Vcc + 0.3
V
4.7k to 10k pull-up to Vcc,
measured at SFP side of
connector
Table 3: Low-speed signals, electrical characteristics
Min
0
Max
0.5
Units
V
Finisar Corporation July 2015 Rev E
Page 3
FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL Product Specification
IV. High-Speed Electrical Interface
All high-speed signals are AC-coupled internally.
High-Speed Electrical Interface, Transmission Line - SFP
Parameter
Line Frequency
Tx Output Impedance
Notes/Conditions
5-level encoding, per IEEE
802.3
Z
out,TX
100
Ohm
Differential, for all
frequencies between 1MHz
and 125MHz
Z
in,RX
100
Ohm
Differential, for all
frequencies between 1MHz
and 125MHz
Table 4: High-speed electrical interface, transmission line-SFP
Symbol
f
L
Min
Typ
125
Max
Units
MHz
Rx Input Impedance
High-Speed Electrical Interface, Host-SFP
Parameter
Single ended data input
swing
Single ended data output
swing
Symbol
V
insing
V
outsing
Min
250
275
Typ
Max
1200
800
Units
mV
mV
Notes/Conditions
Single ended
Single ended, can be modified by writing
to the PHY’s internal registers. For more
details, see Marvell datasheet
5
20%-80%
Single ended
Single ended
Rise/Fall Time
T
r
,T
f
175
Tx Input Impedance
Z
in
50
Rx Output Impedance
Z
out
50
Table 5: High-Speed electrical interface, host-SFP
psec
Ohm
Ohm
Finisar Corporation July 2015 Rev E
Page 4
FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL Product Specification
V.
General Specifications
Symbol
BR
L
Min
10
Notes/Conditions
IEEE 802.3 compatible.
See Notes 2 through 4 below
100
m
Category 5 UTP. BER <10
-12
Table 6: General Specifications
Typ
Max
1,000
Units
Mb/sec
Parameter
Data Rate
Cable Length
Notes:
1. Clock tolerance is +/- 50 ppm
2. By default, the FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL are full duplex
devices in preferred master mode
3. Automatic crossover detection is enabled. External crossover cable is not required
4. 10/100/1000 BASE-T operation requires the host system to have an SGMII interface with no
clocks, and the module PHY to be configured per Application Note AN-2036. With a SERDES that
does not support SGMII, the module will operate at 1000BASE-T only.
VI. Environmental Specifications
The FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL have an industrial temperature
ranges from -40°C to +85°C case temperature as specified in Table 8.
Parameter
Operating Temperature
Storage Temperature
Symbol
T
op
T
sto
Min Typ Max Units Notes/Conditions
-40
85
°C
Case temperature
-40
85
°C
Ambient temperature
Table 7: Environment specifications
VII. Serial Communication Protocol
All Finisar SFPs support the 2-wire serial communication protocol outlined in the SFP MSA
1
.
These SFPs use an Atmel AT24C01A 128 byte E
2
PROM with an address of A0h. For details on
interfacing with the E
2
PROM, see the Atmel data sheet titled “AT24C01A/02/04/08/16 2-Wire
Serial CMOS E
2
PROM.”
4
The 1000BASE-T physical layer IC can also be accessed via the 2-wire serial bus at address ACh.
For details interfacing with the PHY IC, see Marvell data sheet titled “Alaska Ultra 88E1111
Integrated Gigabit Ethernet Transceiver”
5
(Marvell document number MV-S100649-00).
Parameter
I
2
C Clock Rate
Symbol
Min Typ Max
0
100,000
Units
Hz
Notes/Conditions
Table 8: Serial bus timing requirements
Finisar Corporation July 2015 Rev E
Page 5
Test/Measurement
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