FOD2200 — Low Input Current Logic Gate Optocouplers
August 2010
FOD2200
Low Input Current Logic Gate Optocouplers
Features
■
1kV/µs minimum common mode rejection
■
Compatible with LSTTL, TTL, and CMOS logic
■
Wide V
CC
range (4.5V to 20V)
■
2.5Mbd guaranteed over temperature
■
Low input current (1.6mA)
■
Three state output (no pullup resistor required)
■
Guaranteed performance from 0°C to 85°C
■
Hysteresis
■
Safety and regulatory approved
Description
The FOD2200 is an optically coupled logic gate that
combine an AlGaAs LED and an integrated high gain
photo detector. The detector has a three state output
stage and has a detector threshold with hysteresis. The
three state output eliminates the need for a pullup resis-
tor and allows for direct drive of data busses. The hyster-
esis provides differential mode noise immunity and
eliminates the potential for output signal chatter.
The Electrical and Switching Characteristics of the
FOD2200 are guaranteed over the temperature range of
0°C to 85°C and a V
CC
range of 4.5V to 20V. Low I
F
and
wide V
CC
range allow compatibility with TTL, LSTTL, and
CMOS logic and result in lower power consumption
compared to other high speed opto-couplers. Logic
signals are transmitted with a maximum propagation
delay of 300ns. The FOD2200 is useful for isolating high
speed logic interfaces, buffering of input and output
lines, and implementing isolated line receivers in high
noise environments.
– UL1577, 5000 V
RMS
for 1 min.
– IEC60747-5-2
■
>8.0mm clearance and creepage distance
(option ‘T’ or ‘TS’)
■
1,414V Peak Working Insulation Voltage (V
IORM
)
Applications
■
Isolation of high speed logic systems
■
Computer peripheral interfaces
■
Microprocessor system interfaces
■
Ground loop elimination
■
Pulse transformer replacement
■
Isolated bus driver
■
High speed line receiver
Truth Table
(Positive Logic)
LED
On
Off
On
Off
Enable
H
H
L
L
Output
Z
Z
H
L
Functional Block Diagram and Schematic
I
CC
NC 1
ANODE 2
CATHODE 3
NC 4
8 V
CC
7 V
O
6 V
E
5 GND
Package Outlines
V
CC
8
8
1
1
8
I
F
+
V
F
–
2
I
E
3
SHIELD
6
5
I
O
7
V
O
V
E
GND
8
1
SHIELD
8
1
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.4
www.fairchildsemi.com
FOD2200 — Low Input Current Logic Gate Optocouplers
Safety and Insulation Ratings
As per IEC 60747-5-2. This optocoupler is suitable for “safe electrical insulation” only within the safety limit data.
Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Installation Classifications per DIN VDE 0110/1.89 Table 1
For Rated Mains Voltage < 150Vrms
For Rated Mains Voltage < 300Vrms
For Rated Mains Voltage < 450Vrms
For Rated Mains Voltage < 600Vrms
For Rated Mains Voltage < 1000Vrms (Option T, TS)
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Min.
Typ.
I–IV
I–IV
I–III
I–III
I–III
40/85/21
2
Max.
Unit
CTI
V
PR
Comparative Tracking Index
Input to Output Test Voltage, Method b,
V
IORM
x 1.875 = V
PR
, 100% Production Test with
tm = 1 sec., Partial Discharge < 5pC
Input to Output Test Voltage, Method a,
V
IORM
x 1.5 = V
PR
, Type and Sample Test with
tm = 60 sec.,Partial Discharge < 5 pC
175
2651
2121
V
IORM
V
IOTM
Max Working Insulation Voltage
Highest Allowable Over Voltage
External Creepage
External Clearance
External Clearance (for Option T or TS - 0.4” Lead Spacing)
Insulation Thickness
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure
1,414
6000
8
7.4
10.16
0.5
V
peak
V
peak
mm
mm
mm
mm
T
Case
I
S,INPUT
P
S,OUTPUT
R
IO
Case Temperature
Input Current
Output Power (Duty Factor
≤
2.7%)
Insulation Resistance at T
S
, V
IO
= 500V
150
10
150
10
9
°C
mA
mW
Ω
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.4
www.fairchildsemi.com
2
FOD2200 — Low Input Current Logic Gate Optocouplers
Absolute Maximum Ratings
(T
A
= 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
OPR
T
SOL
EMITTER
I
F (PK)
I
F
V
R
P
D
DETECTOR
V
CC
I
O
V
E
V
O
P
D
Supply Voltage
Average Output Current
Storage Temperature
Operating Temperature
Parameter
Value
-40 to +125
-40 to +85
260 for 10 sec
1.0
10
5.0
45
0 to 20
25
-0.5 to 20
-0.5 to 20
150
Units
°C
°C
°C
A
mA
V
mW
V
mA
V
V
mW
Lead Solder Temperature (1.6mm below seating plane)
Peak Transient Input Current (
≤
1µs PW, 300pps)
Average Forward Input Current
Reverse Input Voltage
Output Power Dissipation (No derating required up to 85°C)
Three State Enable Voltage
Output Voltage
Output Power Dissipation (No derating required up to 85°C)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
I
F(ON)
I
F(OFF)
V
CC
V
EL
V
EH
T
A
N
Parameter
Forward Input Current
Forward Input Current
Supply Voltage, Output
Enable Voltage, LOW Level
Enable Voltage, HIGH Level
Operating Temperature
Fan Out (TTL Load)
Min.
1.6*
4.5
0
2.0
0
Max.
5
0.1
20
0.8
20
+85
4
Units
mA
mA
V
V
V
°C
*The initial switching threshold is 1.6mA or less. It is recommended that 2.2mA be used to permit at least a 20%
CTR degradation guardband.
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.4
www.fairchildsemi.com
3
FOD2200 — Low Input Current Logic Gate Optocouplers
Electrical Characteristics
(T
A
= 0°C to +85°C, V
CC
= 4.5V to 20V, I
F(ON)
= 1.6mA to 5mA,
V
EH
= 2V to 20V, V
EL
= 0V to 0.8V, I
F(OFF)
= 0 mA to 0.1mA unless otherwise specified.)
(1)
Individual Component Characteristics
Symbol
EMITTER
V
F
B
VR
C
IN
Input Forward Voltage
Input Reverse Breakdown
Voltage
Input Capacitance
I
F
= 5mA
T
A
= 25°C
I
R
= 10µA
Pins 2 & 3, V
F
= 0, f = 1MHz
I
F
= 5mA
5.0
60
-1.4
1.40
1.75
1.7
V
pF
mV/°C
V
Parameter
Test Conditions
Min.
Typ.*
Max.
Unit
∆
VF/
∆
TA Input Diode Temperature
Coefficient
DETECTOR
I
CCH
I
CCL
I
EL
I
EH
High Level Supply
Current
Low Level Supply Current
Low Level Enable Current
High Level Enable Current
I
F
= 5mA, I
O
= Open,
V
E
= Don’t Care
I
F
= 0, I
O
= Open,
V
E
= Don’t care
V
E
= 0.4V
V
E
= 2.7V
V
E
= 5.5V
V
E
= 20V
V
CC
= 5.5V
V
CC
= 20V
V
CC
= 5.5V
V
CC
= 20V
3.5
4.0
4.4
5.2
-0.1
4.5
6.0
6.0
7.5
-0.32
20
100
mA
mA
mA
µA
0.005
2.0
250
V
0.8
V
V
EH
V
EL
High Level Enable Voltage
Low Level Enable Voltage
Switching Characteristics
(T
A
= 0°C to +85°C, I
F(ON)
= 1.6mA to 5mA, I
F(OFF)
= 0 to 0.1mA, V
CC
= 4.5V to 20V
unless otherwise specified.)
Symbol
T
PLH
T
PHL
t
r
t
f
t
PZH
t
PZL
T
PHZ
T
PLZ
|CM
H
|
AC Characteristics
Propagation Delay Time
to Output High Level
Propagation Delay Time
to Output Low Level
Output Rise Time (10% to 90%)
Output Fall Time (90% to 10%)
Enable Propagation Delay Time
to Output High Level
Enable Propagation Delay Time
to Output Low Level
Test Conditions
With Peaking Capacitor
(2)(4)
(Fig. 1)
With Peaking Capacitor
(3)(4)
(Fig. 1)
(5)
(6)
Min.
Typ.*
120
180
80
25
40
50
95
80
Max. Unit
300
300
ns
ns
ns
ns
ns
ns
ns
ns
V/µs
(Fig. 1)
(Fig. 1)
(Fig. 2)
(Fig. 2)
Disable Propagation Delay Time from (Fig. 2)
Output High Level
Disable Propagation Delay Time from (Fig. 2)
Output Low Level
Common Mode Transient Immunity
(at Output High Level)
T
A
=25°C,
V
OH
(Min.) = 2.0V,
V
CC
= 5V
(7)
(Fig. 3)
T
A
=25°C, I
F
= 0mA
V
OL
(Max.) = 0.8 V,
V
CC
= 5V
(8)
(Fig. 3)
I
F
= 1.6mA,
|V
CM
| = 50V
I
F
= 5mA,
|V
CM
| = 1,000V
|V
CM
| = 50V
|V
CM
| = 1,000V
1,000
10,000
1,000
10,000
|CM
L
|
Common Mode
Transient Immunity
(at Output Low Level)
V/µs
*Typical values at T
A
= 25°C, V
CC
= 5V, I
F(ON)
= 3mA unless otherwise specified.
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.4
www.fairchildsemi.com
4
FOD2200 — Low Input Current Logic Gate Optocouplers
Electrical Characteristics
(Continued)
Transfer Characteristics
(T
A
= 0°C to +85°C, V
CC
= 4.5V to 20V, I
F(ON)
= 1.6mA to 5mA, V
EH
= 2V to 20V,
V
EL
= 0V to 0.8V, I
F(OFF)
= 0mA to 0.1mA unless otherwise specified.)
(1)
Symbol
I
OHH
V
OL
I
FT
V
OH
I
OZL
I
OZH
DC Characteristics
Output Leakage Current
(V
OUT
> V
CC
)
Low Level Output Voltage
Input Threshold Current
Logic High Output Voltage
High Impedance State
Output Current
High Impedance State
Output Current
Test Conditions
V
CC
= 4.5V, I
F
= 5mA
V
O
= 5.5V
V
O
= 20V
V
CC
= 4.5 V, I
F
= 0mA, V
E
= 0.4 V,
I
OL
= 6.4mA
(2)
V
CC
= 4.5V, V
O
= 0.5V, V
E
= 0.4V,
I
OL
= 6.4mA
I
OH
= -2.6mA
V
O
= 0.4V, V
EN
= 2V, I
F
= 5mA
V
O
= 2.4 V, V
EN
= 2 V, I
F
= 5mA
V
O
= 5.5 V, V
EN
= 2 V, I
F
= 5mA
V
O
= 20 V, V
EN
= 2 V, I
F
= 5mA
V
O
= V
CC
= 5.5V, I
F
= 0mA
V
O
= V
CC
= 20V, I
F
= 0mA
V
CC
= 5.5V, I
F
= 5mA, V
O
= GND
V
CC
= 20V, I
F
= 5mA, V
O
= GND
V
CC
= 4.5V
Min.
Typ.*
2.0
2.5
0.33
Max.
100
500
0.5
1.6
Unit
µA
V
mA
V
2.4
V
CC
– 1.8
-20
20
100
500
µA
µA
I
OSL
I
OSH
I
HYS
Logic Low Short Circuit
Output Current
(10)
Logic High Short Circuit
Output Current
(10)
Input Current Hysteresis
25
40
-10
-25
0.03
mA
mA
mA
Isolation Characteristics
(T
A
= 0°C to +85°C unless otherwise specified)
Symbol
V
ISO
R
I-O
C
I-O
Characteristics
Withstand Insulation Test Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Test Conditions
R
H
< 50%, T
A
= 25°C, t = 1 min.
(9)
V
I-O
= 500 VDC
(9)
V
I-O
= 0V, f = 1MHz
(9)
Min.
5000
Typ.*
10
12
0.6
Max.
Unit
V
RMS
Ω
pF
*Typical values at T
A
= 25°C, V
CC
= 5V, I
F(ON)
= 3mA unless otherwise stated.
Notes:
1. The V
CC
supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V
CC
and GND pins of each device.
2. t
PLH
– Propagation delay is measured from the 50% level on the LOW to HIGH transition of the input current pulse
to the 1.3V level on the LOW to HIGH transition of the output voltage pulse.
3. t
PHL
– Propagation delay is measured from the 50% level on the HIGH to LOW transition of the input current pulse
to the 1.3V level on the HIGH to LOW transition of the output voltage pulse.
4. When the peaking capacitor is omitted, propagation delay times may increase by 100ns.
5. t
r
– Rise time is measured from the 10% to the 90% levels on the LOW to HIGH transition of the output pulse.
6. t
f
– Fall time is measured from the 90% to the 10% levels on the HIGH to LOW transition of the output pulse.
7. CM
H
– The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the high
state (i.e., V
OUT
> 2.0V).
8. CM
L
– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low
state (i.e., V
OUT
< 0.8V).
9. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together.
10. Duration of output short circuit time should not exceed 10ms.
©2004 Fairchild Semiconductor Corporation
FOD2200 Rev. 1.0.4
www.fairchildsemi.com
5
京公网安备 11010802033920号
EEWORLD
