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MT8926

Description
ISO-CMOS ST-BUS⑩ FAMILY T1 Performance Monitoring Adjunct Circuit (PMAC)
File Size217KB,26 Pages
ManufacturerMitel
Websitehttps://www.mitel.com
Download Datasheet View All

MT8926 Overview

ISO-CMOS ST-BUS⑩ FAMILY T1 Performance Monitoring Adjunct Circuit (PMAC)

®
ISO-CMOS ST-BUS™ FAMILY
MT8926
T1 Performance Monitoring
Adjunct Circuit (PMAC)
Features
ANSI T1.403 and T1.408 Performance
Monitoring and Maintenance Functions
Operates in conjunction with Mitel's T1/ESF
framer circuits (MT8976/77 and MH89760B)
D3/D4 (SF), and ESF modes of operation
One and two second timers
Supports bit-oriented and message-oriented
data transfer over the Facility Data Link (FDL)
ESF and D3/D4 Yellow Alarms, Alarm Indication
Signal and Loss of Signal Indication
Framing Error, CRC Error and Bipolar Violation
Error counters
Alarm interrupts and counter overflow interrupts
ISSUE 3
July 1993
Ordering Information
MT8926AE
MT8926AP
28 Pin Plastic DIP
28 Pin PLCC
-40°C to 85°C
Description
The MT8926 Performance Monitoring Adjunct Circuit
(PMAC) interworks with Mitel's MT8976/77 and
MH89760B to provide performance monitoring data,
alarms and T1 maintenance features.
It meets the performance monitoring and
maintenance requirements of ANSI T1.403 and
T1.408, and also supports Channel Service Unit
(CSU) requirements.
Applications
T1 line performance data collection
CSU performance monitoring
ISDN Primary Rate maintenance controller
FDLi
E8Ki
Transmit BOM
Register
Receive BOM Register &
RAI Debounce
IRQ
C2i
CSTi0
CSTi1
CSTo
BSI
RESET
ST-BUS
Interface
Snap-
Shot
Registers
FSI
SEI
4 Bit SE
Counter
4 Bit FE
Counter
E8Ko
E8K/FDL
Mux
FDLo
FDL
Extractor
Framer,
SE/FE
Detector
Line
Loopback
Integrator
V
DD
V
SS
8 Bit BPV
Counter
RxA
B8ZS
Recovery,
BPV Detector
RxB
ECLK
DSTi0
DSTi1
DSTo
F0i
Payload
& Line
Loopback
Control
8 Bit CRC
Counter CSI
AIS/LOS
Detector
Timer
1SEC
Figure 1 - Functional Block Diagram
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