TC581282AXB
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
2
128-MBIT (16M
×
8 BITS) CMOS NAND E PROM
DESCRIPTION
The TC581282A is a single 3.3 V 128-Mbit (138,412,032) bit NAND Electrically Erasable and Programmable
Read-Only Memory (NAND E
2
PROM) organized as 528 bytes
×
32 pages
×
1024 blocks. The device has a 528-byte
static register which allows program and read data to be transferred between the register and the memory cell array
in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes
+
512 bytes: 528 bytes
×
32 pages).
The TC581282A is a serial-type memory device which utilizes the I/O pins for both address and data input/output
as well as for command inputs. The Erase and Program operations are automatically executed making the device
most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras
and other systems which require high-density non-volatile memory data storage.
FEATURES
•
Organization
Memory cell allay 528
×
32K
×
8
Register
528
×
8
Page size
528 bytes
Block size
(16K
+
512) bytes
Modes
Read, Reset, Auto Page Program
Auto Block Erase, Status Read
Mode control
Serial input/output
Command control
•
•
•
•
Power supply
V
CC
=
2.7 V to 3.6 V
Program/Erase Cycles 1E5 cycle (with ECC)
Access time
Cell array to register 25
µs
max
Serial Read Cycle
50 ns min
Operating current
Read (50 ns cycle)
10 mA typ.
Program (avg.)
10 mA typ.
Erase (avg.)
10 mA typ.
Standby
100
µA
Package
P-TFBGA56-0710-0.80AZ (Weight:
g typ.)
•
•
•
PIN ASSIGNMENT
(TOP VIEW)
1
A
B
C
D
E
F
G
H
J
K
L
M
NC
NC
NC
NC
NU
NU
WP
NU
NU
CE
PIN NAMES
7
8
NC
NC
I/O1 to I/O8
CE
2
3
4
5
6
I/O port
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy
Ground input
Power supply
Ground
NC : Not Connected
000707EBA1
CLE
ALE
WE
NU
NU
I/O1
NU
I/O2
NU
NU
NU
NU
NU
I/O3
NU
I/O4
NU
NU
NU
NU
NU
NU
V
CC
I/O6
NU
NU
NU
NU
RY/BY
NU
NU
GND
NU
NU
NU
I/O7
NC
NC
NC
WE
RE
CLE
ALE
WP
RY/BY
GND
V
CC
V
SS
NU : Not used,
NU
I/O8
I/O5
RE
V
SS
•
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide
for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
•
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
•
The products described in this document are subject to the foreign exchange and foreign trade laws.
•
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
•
The information contained herein is subject to change without notice.
2001-12-04 1/31
TC581282AXB
AC CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
(Ta
=
−
40° to 85°C, V
CC
=
2.7 V to 3.6 V)
SYMBOL
t
CLS
t
CLH
t
CS
t
CH
t
WP
t
ALS
t
ALH
t
DS
t
DH
t
WC
t
WH
t
WW
t
RR
t
RP
t
RC
t
REA
t
CEA
t
REAID
t
OH
t
RHZ
t
CHZ
t
REH
t
IR
t
RSTO
t
CSTO
t
RHW
t
WHC
t
WHR
t
AR1
t
CR
t
R
t
WB
t
AR2
t
RST
CLE Setup Time
CLE Hold Time
CE Setup Time
CE Hold Time
Write Pulse Width
ALE Setup Time
ALE Hold Time
Data Setup Time
Data Hold Time
Write Cycle Time
PARAMETER
MIN
0
10
0
10
25
0
10
20
10
50
15
100
20
35
50
10
15
0
0
30
30
100
100
50
MAX
35
45
35
30
20
35
45
25
200
6/10/500
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
NOTES
WE
High Hold Time
WP
High to
WE
Low
Ready to
RE
Falling Edge
Read Pulse Width
Read Cycle Time
RE
Access Time (Serial Data Access)
CE Access Time (Serial Data Access)
RE
Access Time (ID Read)
Data Output Hold Time
RE
High to Output High Impedance
CE High to Output High Impedance
RE
High Hold Time
Output-High-impedance-to-
RE
Falling Edge
RE
Access Time (Status Read)
CE Access Time (Status Read)
RE
High to
WE
Low
WE
High to CE Low
WE
High to
RE
Low
ALE Low to
RE
Low (ID Read)
CE Low to
RE
Low (ID Read)
Memory Cell Array to Starting Address
WE
High to Busy
ALE Low to
RE
Low (Read Cycle)
Device Reset Time (Read/Program/Erase)
AC TEST CONDITIONS
PARAMETER
Input level
Input pulse rise and fall time
Input comparison level
Output data comparison level
Output load
CONDITION
2.4 V, 0.4 V
3 ns
1.5 V, 1.5 V
1.5 V, 1.5 V
C
L
(100 pF)
+
1 TTL
2001-12-04 4/31
Embedded System
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