19-3131; Rev 0; 3/08
50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
General Description
The MAX2065 high-linearity, analog/digital variable-
gain amplifier (VGA) is designed to operate in the
50MHz to 1000MHz frequency range with two indepen-
dent attenuators (see the
Typical Application Circuit).
The digital attenuator is controlled as a slave peripheral
using either the SPI™-compatible interface or a parallel
bus with 31dB total adjustment range in 1dB steps. An
added feature allows “rapid-fire” gain selection
between each of four steps, preprogrammed by the
user through the SPI-compatible interface. The 2-pin
control allows the user to quickly access any one of
four customized attenuation states without reprogram-
ming the SPI bus. The analog attenuator is controlled
using an external voltage or through the SPI-compatible
interface using an on-chip 8-bit DAC.
Because each of the three stages has its own RF input
and RF output, this component can be configured to
either optimize NF (amplifier configured first), OIP3 (ampli-
fier last), or a compromise of NF and OIP3. The device’s
performance features include 22dB amplifier gain (ampli-
fier only), 6.5dB NF at maximum gain (includes attenuator
insertion losses), and a high OIP3 level of +42dBm. Each
of these features makes the MAX2065 an ideal VGA for
numerous receiver and transmitter applications.
In addition, the MAX2065 operates from a single +5V
supply with full performance, or a single +3.3V supply
with slightly reduced performance, and has an
adjustable bias to trade current consumption for linearity
performance. This device is available in a compact 40-
pin thin QFN package (6mm x 6mm) with an exposed
pad. Electrical performance is guaranteed over the
extended temperature range (T
C
= -40°C to +85°C).
♦
Pin-Compatible Family Includes:
MAX2066 (Digital VGA)
MAX2067 (Analog VGA)
♦
+19.4dB (Typ) Maximum Gain
♦
0.5dB Gain Flatness Over 100MHz Bandwidth
♦
62dB Gain Range (31dB Analog + 31dB Digital)
♦
Built-in DAC for Analog Attenuation Control
♦
Supports Four “Rapid-Fire” Preprogrammed
Attenuator States
Quickly Access Any One of Four Customized
Attenuation States Without Reprogramming
the SPI Bus
Ideal for Fast-Attack, High-Level Blocker Protection
Prevents ADC Overdrive Condition
♦
Excellent Linearity (Configured with Amplifier
Last)
+42dBm OIP3
+63dBm OIP2
+19dBm Output 1dB Compression Point
-67dBc HD2
-83dBc HD3
♦
6.5dB Typical Noise Figure (NF)
♦
Fast, 25ns Digital Switching
♦
Very Low Digital VGA Amplitude Overshoot/
Undershoot
♦
Single +5V Supply (Optional +3.3V Operation)
♦
External Current-Setting Resistors Provide Option
for Operating Device in Reduced-Power/
Reduced-Performance Mode
Features
♦
50MHz to 1000MHz RF Frequency Range
MAX2065
Applications
IF and RF Gain Stages
Temperature Compensation Circuits
Cellular Band WCDMA and cdma2000
®
Base
Stations
GSM 850/GSM 900 EDGE Base Stations
WiMAX and LTE Base Stations and Customer
Premise Equipment
Fixed Broadband Wireless Access
Wireless Local Loop
Military Systems
Video-on-Demand (VOD) and DOCSIS
®
-
Compliant EDGE QAM Modulation
Cable Modem Termination Systems (CMTS)
Ordering Information
PART
MAX2065ETL+
TEMP RANGE
PIN-
PACKAGE
PKG
CODE
T4066-3
T4066-3
-40°C to +85°C 40 Thin QFN-EP*
MAX2065ETL+T -40°C to +85°C 40 Thin QFN-EP*
+Denotes
a lead-free package.
*EP
= Exposed pad.
T = Tape and reel.
Pin Configuration appears at end of data sheet.
cdma2000 is a registered trademark of Telecommunications
Industry Association.
DOCSIS and CableLabs are registered trademarks of Cable
Television Laboratories, Inc. (CableLabs®).
1
SPI is a trademark of Motorola, Inc.
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
MAX2065
ABSOLUTE MAXIMUM RATINGS
VCC_ to GND ........................................................-0.3V to +5.5V
VDD_LOGIC, DATA,
CS,
CLK, SER/PAR, VDAC_EN,
VREF_SELECT.....................................-0.3V to (VCC_ + 0.3V)
STATE_A, STATE_B, D0–D4 ....................-0.3V to (VCC_ + 0.3V)
AMP_IN, AMP_OUT, VREF_IN,
ANALOG_VCTRL ................................-0.3V to (VCC_ + 0.3V)
ATTEN1_IN, ATTEN1_OUT, ATTEN2_IN,
ATTEN2_OUT...................................................-1.2V to + 1.2V
RSET to GND........................................................-0.3V to + 1.2V
RF Input Power (ATTEN1_IN, ATTEN1_OUT,
ATTEN2_IN, ATTEN2_OUT).......................................+20dBm
RF Input Power (AMP_IN)...............................................+18dBm
Continuous Power Dissipation (Note 1) ...............................6.5W
θ
JA
(Notes 2, 3)..............................................................+38°C/W
θ
JC
(Note 3) ...................................................................+10°C/W
Operating Temperature Range (Note 4) .....T
C
= -40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1:
Based on junction temperature T
J
= T
C
+ (θ
JC
x V
CC
x I
CC
). This formula can be used when the temperature of the exposed
pad is known while the device is soldered down to a printed-circuit board (PCB). See the
Applications Information
section
for details. The junction temperature must not exceed +150°C.
Note 2:
Junction temperature T
J
= T
A
+ (θ
JA
x V
CC
x I
CC
). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150°C.
Note 3:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Note 4:
T
C
is the temperature on the exposed pad of the package. T
A
is the ambient temperature of the device and PCB.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
+3.3V SUPPLY DC ELECTRICAL CHARACTERISTICS
(Typical
Application Circuit,
high-current (HC) mode, V
CC
= +3.0V to +3.6V, T
C
= -40°C to +85°C. Typical values are at V
CC
= +3.3V
and T
C
= +25°C, unless otherwise noted.)
PARAMETER
Supply Voltage
Supply Current
Input High Voltage
Input Low Voltage
SYMBOL
V
CC
I
CC
V
IH
V
IL
CONDITIONS
MIN
3.0
TYP
3.3
60
2
0.8
MAX
3.6
80
UNITS
V
mA
V
V
LOGIC INPUTS (DATA,
CS,
CLK, VDAC_EN, VREF_SELECT, SER/PAR, STATE_A, STATE_B, D0–D4)
+5V SUPPLY DC ELECTRICAL CHARACTERISTICS
(
Typical Application Circuit
, V
CC
= +4.75V to +5.25V, T
C
= -40°C to +85°C. Typical values are at V
CC
= +5V and
T
C
= +25°C, unless otherwise noted.)
PARAMETER
Supply Voltage
Supply Current
SYMBOL
V
CC
I
CC
Low-current (LC) mode
High-current (HC) mode
3
0.8
-1
-1
+1
+1
CONDITIONS
MIN
4.75
TYP
5
73
124
MAX
5.25
93
146
UNITS
V
mA
LOGIC INPUTS (DATA,
CS,
CLK, VDAC_EN, VREF_SELECT, SER/PAR, STATE_A, STATE_B, D0–D4)
Input High Voltage
Input Low Voltage
Input Current Logic-High
Input Current Logic-Low
V
IH
V
IL
I
IH
I
IL
V
V
µA
µA
2
_______________________________________________________________________________________
50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
+3.3V SUPPLY AC ELECTRICAL CHARACTERISTICS
(Typical
Application Circuit,
V
CC
= +3.0V to +3.6V, T
C
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, HC mode with attenua-
tors set for maximum gain, P
IN
= -20dBm, f
RF
= 200MHz, and T
C
= +25
o
C, unless otherwise noted.) (Note 5)
PARAMETER
RF Frequency Range
Small Signal Gain
Output Third-Order Intercept
Point
Noise Figure
Total Attenuation Range
SYMBOL
f
RF
G
OIP3
NF
P
OUT
= 0dBm/tone, maximum gain setting
Maximum gain setting
Analog and digital combined
(Notes 6, 7)
CONDITIONS
MIN
50
18.8
37.5
6.7
61.5
TYP
MAX
1000
UNITS
MHz
dB
dBm
dB
dB
MAX2065
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS
(Typical
Application Circuit,
V
CC
= +4.75 to +5.25V, HC mode with each attenuator set for maximum gain, 50MHz
≤
f
RF
≤
1000MHz,
T
C
= -40°C to +85°C. Typical values are at V
CC
= +5.0V, HC mode, P
IN
= -20dBm, f
RF
= 200MHz, and T
C
= +25
o
C, unless otherwise
noted.) (Note 5)
PARAMETER
RF Frequency Range
SYMBOL
f
RF
(Notes 6, 7)
200MHz
350MHz, T
C
= +25°C
Small Signal Gain
G
450MHz
750MHz
900MHz
Gain Variation vs. Temperature
Gain Flatness vs. Frequency
Any 100MHz frequency band from 50MHz
to 500MHz
200MHz
350MHz, T
C
= +25°C (Note 7)
Noise Figure
NF
450MHz
750MHz
900MHz
Total Attenuation Range
Output Second-Order Intercept
Point
OIP2
Analog and digital combined
P
OUT
= 0dBm/tone,
Δf
= 1MHz, f
1
+ f
2
200MHz
350MHz
P
OUT
= 0dBm/tone,
HC mode,
Δ
f = 1MHz
Output Third-Order Intercept
Point
OIP3
450MHz
750MHz
900MHz
200MHz
350MHz
P
OUT
= 0dBm/tone,
450MHz
LC mode,
Δf
= 1MHz
750MHz
900MHz
17.5
CONDITIONS
MIN
50
19.4
18.7
18.2
16.4
15.6
-0.006
0.5
6.5
6.8
7
7.8
8.2
61.5
63
42
40
39
36
35
40
38
37
35
33
dBm
dB
dBm
8
dB
dB/°C
dB
19.7
dB
TYP
MAX
1000
UNITS
MHz
_______________________________________________________________________________________
3
50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
MAX2065
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued)
(Typical
Application Circuit,
V
CC
= +4.75 to +5.25V, HC mode with each attenuator set for maximum gain, 50MHz
≤
f
RF
≤
1000MHz,
T
C
= -40°C to +85°C. Typical values are at V
CC
= +5.0V, HC mode, P
IN
= -20dBm, f
RF
= 200MHz, and T
C
= +25
o
C, unless otherwise
noted.) (Note 5)
PARAMETER
Output -1dB Compression Point
Second Harmonic
Third Harmonic
Input Return Loss
Output Return Loss
DIGITAL ATTENUATOR
Insertion Loss
Input Second-Order Intercept
Point
Input Third-Order Intercept Point
Attenuation Range
Step Size
Relative Step Accuracy
Absolute Step Accuracy
0dB to 16dB
Insertion Phase Step
f
RF
= 170MHz
Between any two
states
RF settled to within
±0.1dB
50Ω source
50Ω load
24dB
31dB
Amplitude Overshoot/Undershoot
Switching Speed
Input Return Loss
Output Return Loss
ANALOG ATTENUATOR
Insertion Loss
Input Second-Order Intercept
Point
Input Third-Order Intercept Point
Attenuation Range
Gain Control Slope
Maximum Gain Control Slope
Insertion Phase Change
Group Delay
Group Delay vs. Control Voltage
Analog Control Input Range
IIP2
IIP3
P
RF1
= 0dBm, P
RF2
= 0dBm, maximum gain
setting,
Δf
= 1MHz, f
1
+ f
2
P
RF1
= 0dBm, P
RF2
= 0dBm, maximum gain
setting,
Δf
= 1MHz
Analog control input
Analog control input
Over analog control input range
Over analog control input range
Maximum gain setting
Over analog control input range
0.25
1.2
70
36
31.1
-12.5
-35
18
0.98
-0.25
2.75
dB
dBm
dBm
dB
dB/V
dB/V
Degrees
ns
ns
V
ET = 15ns
ET = 40ns
31dB to 0dB
0dB to 31dB
IIP2
IIP3
P
RF1
= 0dBm, P
RF2
= 0dBm,
Δf
= 1MHz,
f
1
+ f
2
P
RF1
= 0dBm, P
RF2
= 0dBm,
Δf
= 1MHz
2.5
52
41
31.2
1
0.2
0.45
4.8
8
10.8
1.0
0.05
25
21
19
19
dB
ns
dB
dB
Degrees
dB
dBm
dBm
dB
dB
dB
dB
SYMBOL
P
1dB
CONDITIONS
350MHz, T
C
= +25°C (Note 8)
P
OUT
= +3dBm, f
RF
= 200MHz, T
C
= +25°C
(Note 7)
P
OUT
= +3dBm, f
RF
= 200MHz, T
C
= +25°C
(Note 7)
50Ω source, maximum gain setting
50Ω load, maximum gain setting
MIN
17
-60
-71
TYP
18.7
-67
-83
18
18
MAX
UNITS
dBm
dBc
dBc
dB
dB
4
_______________________________________________________________________________________
50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued)
(Typical
Application Circuit,
V
CC
= +4.75 to +5.25V, HC mode with each attenuator set for maximum gain, 50MHz
≤
f
RF
≤
1000MHz,
T
C
= -40°C to +85°C. Typical values are at V
CC
= +5.0V, HC mode, P
IN
= -20dBm, f
RF
= 200MHz, and T
C
= +25
o
C, unless otherwise
noted.) (Note 5)
PARAMETER
Analog Control Input Impedance
Input Return Loss
Output Return Loss
D/A CONVERTER
Number of Bits
Output Voltage
SERIAL PERIPHERAL INTERFACE (SPI)
Maximum Clock Speed
Data-to-Clock Setup Time
Data-to-Clock Hold Time
Clock-to-CS Setup Time
CS
Positive Pulse Width
CS
Setup Time
Clock Pulse Width
f
CLK
t
CS
t
CH
t
ES
t
EW
t
EWS
t
CW
20
2
2.5
3
7
3.5
5
MHz
ns
ns
ns
ns
ns
ns
DAC code = 00000000
DAC code = 11111111
2.75
8
0.25
Bits
V
50Ω source
50Ω load
SYMBOL
CONDITIONS
MIN
TYP
80
22
22
MAX
UNITS
kΩ
dB
dB
MAX2065
Note 5:
All limits include external component losses. Output measurements are performed at RF output port of the
Typical
Application Circuit.
Note 6:
Operating outside this range is possible, but with degraded performance of some parameters.
Note 7:
Guaranteed by design and characterization.
Note 8:
It is advisable not to operate continuously the VGA RF input above +15dBm.
_______________________________________________________________________________________
5
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