Over-Voltage Tolerant 1.5V, 1:4
Fanout Buffer
830154I-08
Data Sheet
General Description
The 830154I-08 is an LVCMOS, over-voltage tolerant clock fanout
buffer targeted for clock generation in high-performance
telecommunication, networking and computing applications. The
device is optimized for low-skew clock distribution in low-voltage
applications. The input over-voltage tolerance enables using this
device in mixed-mode voltage applications. An output enable pin
controls whether the outputs are in the active or high impedance
state. Guaranteed output skew characteristics make the 830154I-08
ideal for those applications demanding well defined performance and
repeatability. The 830154I-08 is packaged in a small 8-TSSOP and
in an 8-SOIC package.
Features
•
•
•
•
•
•
•
•
•
Low-skew 1:4 fanout buffer
Supports 3.3V, 2.5V, 1.8V and 1.5V power supplies
LVCMOS input and output levels
3.6V Over-voltage tolerance at the clock and control inputs
Supports clock frequencies up to 160MHz
LVCMOS compatible control input for output disable
Output disabled to a high-impedance state
-40°C to 85°C ambient operating temperature
Available in lead-free RoHS 6 packages (8-TSSOP, 8-SOIC)
Block Diagram
CLK_IN
Pulldown
Q1
Pin Assignments
Q2
CLK_IN
Q1
Q2
Q3
1
2
3
4
8
7
6
5
OE
V
DD
GND
Q4
Q3
Q4
Pullup
830154AMI-08
8-SOIC, 150 mil
3.9mm x 4.9mm x 1.375mm package body
M-Package
Top View
830154AGI-08
8-TSSOP
4.4mm x 3.0mm x 0.925mm package body
G-Package
Top View
OE
©2016 Integrated Device Technology, Inc
1
Revision A March 30, 2016
830154I-08 Data Sheet
Table 1. Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
CLK_IN
Q1
Q2
Q3
Q4
GND
V
DD
OE
Input
Output
Output
Output
Output
Power
Power
Input
Pullup
Type
Pulldown
Description
Single-ended clock input. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Single-ended clock output. LVCMOS interface levels.
Power supply ground.
Power supply pin.
Output enable pin. See Table 3. LVCMOS interface levels.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
Parameter
Input Capacitance
V
DD
= 3.465V
C
PD
Power Dissipation Capacitance
V
DD
= 2.375V
V
DD
= 1.95V
V
DD
= 1.6V
R
PULLUP
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
14
13
13
12
51
51
V
DD
= 3.3V ± 5%
R
OUT
Output Impedance
V
DD
= 2.5V ± 5%
V
DD
= 1.8V ± 0.15V
V
DD
= 1.5 ± 0.1V
9
10
12
15
Maximum
Units
pF
pF
pF
pF
pF
k
k
R
PULLDOWN
Input Pulldown Resistor
Function Table
Table 3. OE Configuration Table
Input
OE
0
1 (default)
Operation
Q[4:1] disabled (high-impedance)
Q[4:1] enabled
NOTE: OE is an asynchronous control.
©2016 Integrated Device Technology, Inc
2
Revision A March 30, 2016
830154I-08 Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
JA
8 Lead TSSOP
8 Lead SOIC
Storage Temperature, T
STG
Rating
4.6V
3.6V
-0.5V to V
DD
+ 0.5V
121.5°C/W (0 mps)
103°C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
V
DD
I
DDQ
Parameter
Power Supply Voltage
Quiescent Power Supply Current
Inputs Open, Outputs Unloaded
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
1
Units
V
mA
Table 4B. Power Supply DC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
DD
I
DDQ
Parameter
Power Supply Voltage
Quiescent Power Supply Current
Inputs Open, Outputs Unloaded
Test Conditions
Minimum
2.375
Typical
2.5
Maximum
2.625
1
Units
V
mA
Table 4C. Power Supply DC Characteristics,
V
DD
= 1.8V ± 0.15V, T
A
= -40°C to 85°C
Symbol
V
DD
I
DDQ
Parameter
Power Supply Voltage
Quiescent Power Supply Current
Inputs Open, Outputs Unloaded
Test Conditions
Minimum
1.65
Typical
1.8
Maximum
1.95
1
Units
V
mA
Table 4D. Power Supply DC Characteristics,
V
DD
= 1.5V ± 0.1V, T
A
= -40°C to 85°C
Symbol
V
DD
I
DDQ
Parameter
Power Supply Voltage
Quiescent Power Supply Current
Inputs Open, Outputs Unloaded
Test Conditions
Minimum
1.4
Typical
1.5
Maximum
1.6
1
Units
V
mA
©2016 Integrated Device Technology, Inc
3
Revision A March 30, 2016
830154I-08 Data Sheet
Table 4E. LVCMOS DC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK_IN
Input High Current
OE
CLK_IN
I
IL
V
OH
V
OL
Input Low Current
OE
Output High Voltage
Output Low Voltage
Q[4:1]
Q[4:1]
V
DD
= V
IN
= 3.465V
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
V
DD
= 3.465V, V
IN
= 0V
I
OH
= -12mA
I
OL
= 12mA
-5
-150
2.6
0.5
Test Conditions
Minimum
0.65 * V
DD
-0.3
Typical
Maximum
3.6
0.35 * V
DD
150
5
Units
V
V
µA
µA
µA
µA
V
V
Table 4F. LVCMOS DC Characteristics,
V
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK_IN
Input High Current
OE
CLK_IN
I
IL
V
OH
V
OL
Input Low Current
OE
Output High Voltage
Output Low Voltage
Q[4:1]]
Q[4:1]
V
DD
= V
IN
= 2.625V
V
DD
= V
IN
= 2.625V
V
DD
= 2.625V, V
IN
= 0V
V
DD
= 2.625V, V
IN
= 0V
I
OH
= -12mA
I
OL
= 12mA
-5
-150
1.8
0.5
Test Conditions
Minimum
0.65 * V
DD
-0.3
Typical
Maximum
3.6
0.35 * V
DD
150
5
Units
V
V
µA
µA
µA
µA
V
V
Table 4G. LVCMOS DC Characteristics,
V
DD
= 1.8V ± 0.15V, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK_IN
Input High Current
OE
CLK_IN
I
IL
V
OH
V
OL
Input Low Current
OE
Output High Voltage
Output Low Voltage
Q[4:1]
Q[4:1]
V
DD
= 1.95V, V
IN
= 0V
V
DD
= 1.95V, V
IN
= 0V
I
OH
= -6mA
I
OL
= 6mA
-5
-150
V
DD
– 0.45
0.45
V
DD
= V
IN
= 1.95V
Test Conditions
Minimum
0.65 * V
DD
-0.3
Typical
Maximum
3.6
0.35 * V
DD
150
5
Units
V
V
µA
µA
µA
µA
V
V
©2016 Integrated Device Technology, Inc
4
Revision A March 30, 2016
830154I-08 Data Sheet
Table 4H. LVCMOS DC Characteristics,
V
DD
= 1.5V ± 0.1V, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK_IN
Input High Current
OE
CLK_IN
I
IL
V
OH
V
OL
Input Low Current
OE
Output High Voltage
Output Low Voltage
Q[4:1]
Q[4:1]
V
DD
= V
IN
= 1.6V
V
DD
= V
IN
= 1.6V
V
DD
= 1.6V, V
IN
= 0V
V
DD
= 1.6V, V
IN
= 0V
I
OH
= -4mA
I
OL
= 4mA
-5
-150
0.75 * V
DD
0.25 * V
DD
Test Conditions
Minimum
0.65 * V
DD
-0.3
Typical
Maximum
3.6
0.35 * V
DD
150
5
Units
V
V
µA
µA
µA
µA
V
V
AC Electrical Characteristics
Table 5A. AC Characteristics,
V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Symbol
f
OUT
tp
LH
tp
HL
t
PLZ,
t
PHZ
t
PZL,
t
PZH
tsk(o)
tsk(pp)
tjit
t
R
/ t
F
odc
Parameter
Output Frequency
Propagation Delay
(low to high transition); NOTE 1
Propagation Delay
(high to low transition); NOTE 1
Disable Time
(active to high-impedance)
Enable Time
(high-impedance to disable)
Output Skew; NOTE 2, 3
Part-to-Part Skew; NOTE 2, 4
0.7
0.7
Test Conditions
Minimum
Typical
Maximum
160
1.45
1.45
10
10
250
800
25MHz, Integration Range:
12kHz - 5MHz
10% to 90%
0.35
48
0.094
1.2
52
Units
MHz
ns
ns
ns
ns
ps
ps
ps
ns
%
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
Output Rise/Fall Time
Output Duty Cycle
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
NOTE: Characterized up to F
OUT
150MHz.
NOTE 1: Measured from the V
DD
/2 of the input to V
DD
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DD
/2.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at V
DD
/2.
©2016 Integrated Device Technology, Inc
5
Revision A March 30, 2016
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