19-5633; Rev 11/10
DS1249W
3.3V 2048kb Nonvolatile SRAM
www.maxim-ic.com
FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Unlimited write cycles
Low-power CMOS operation
Read and write access times of 100ns
Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time
Optional industrial (IND) temperature range
of -40°C to +85°C
JEDEC standard 32-pin DIP package
PIN ASSIGNMENT
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
32-Pin Encapsulated Package
740mil Extended
PIN DESCRIPTION
A0–A17
DQ0–DQ7
CE
WE
OE
V
CC
GND
NC
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+3.3V)
- Ground
- No Connect
DESCRIPTION
The DS1249W 2048kb nonvolatile (NV) SRAMs are 2,097,152-bit, fully static, NV SRAMs organized as
262,144 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry
that constantly monitors V
CC
for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. There is no limit on the number of write cycles that can be executed, and no additional
support circuitry is required for microprocessor interfacing.
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DS1249W
READ MODE
The DS1249 devices execute a read cycle whenever
WE
(Write Enable) is inactive (high) and
CE
(Chip
Enable) and
OE
(Output Enable) are active (low). The unique address specified by the 18 address inputs
(A
0
– A
17
) defines which of the 262,144 bytes of data is accessed. Valid data will be available to the eight
data output drivers within t
ACC
(Access Time) after the last address input signal is stable, providing that
CE
and
OE
access times are also satisfied. If
OE
and
CE
access times are not satisfied, then data access
must be measured from the later-occurring signal (
CE
or
OE
) and the limiting parameter is either t
CO
for
CE
or t
OE
for
OE
rather than t
ACC
.
WRITE MODE
The DS1249 executes a write cycle whenever the
WE
and
CE
signals are active (low) after address
inputs are stable. The later-occurring falling edge of
CE
or
WE
will determine the start of the write cycle.
The write cycle is terminated by the earlier rising edge of
CE
or
WE
. All address inputs must be kept
valid throughout the write cycle.
WE
must return to the high state for a minimum recovery time (t
WR
)
before another cycle can be initiated. The
OE
control signal should be kept inactive (high) during write
cycles to avoid bus contention. However, if the output drivers are enabled (
CE
and
OE
active), then
WE
will disable the outputs in t
ODW
from its falling edge.
DATA-RETENTION MODE
The DS1249W provides full functional capability for V
CC
greater than 3.0 volts and write protects by
2.8V. Data is maintained in the absence of V
CC
without any additional support circuitry. The nonvolatile
static RAMs constantly monitor V
CC
. Should the supply voltage decay, the NV SRAMs automatically
write protects themselves, all inputs become “don’t care,” and all outputs become high impedance. As
V
CC
falls below approximately 2.5V, a power-switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when V
CC
rises above approximately 2.5V, the power-switching
circuit connects external V
CC
to the RAM and disconnects the lithium energy source. Normal RAM
operation can resume after V
CC
exceeds 3.0V.
FRESHNESS SEAL
Each DS1249 device is shipped from Maxim with its lithium energy source disconnected, guaranteeing
full energy capacity. When V
CC
is first applied at a level greater than V
TP
, the lithium energy source is
enabled for battery backup operation.
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DS1249W
ABSOLUTE MAXIMUM RATINGS
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Commercial:
Industrial:
Storage Temperature Range
Lead Temperature (soldering, 10s)
Note:
EDIP is wave or hand soldered only.
-0.3V to +4.6V
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
+260°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect
reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Power-Supply Voltage
Logic 1
Logic 0
SYMBOL
V
CC
V
IH
V
IL
MIN
3.0
2.2
0.0
TYP
3.3
MAX
3.6
V
CC
+0.4
(T
A
: See Note 10)
UNITS
V
V
V
NOTES
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Input Leakage Current
I/O Leakage Current
CE
≥
V
IH
≤
V
CC
Output Current at 2.2V
Output Current at 0.4V
Standby Current
CE
= 2.2V
Standby Current
CE
= V
CC
- 0.2V
Operating Current
Write Protection Voltage
SYMBOL
I
IL
I
IO
I
OH
I
OL
I
CCS1
I
CCS2
I
CCO1
V
TP
(T
A
: See Note 10; V
CC
= 3.3V
±
0.3V)
MIN
-2.0
-2.0
-1.0
2.0
150
100
2.8
2.9
250
150
50
3.0
TYP
MAX
+2.0
+2.0
UNITS
µA
µA
mA
mA
µA
µA
mA
V
NOTES
CAPACITANCE
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN
TYP
10
10
MAX
20
20
(T
A
= +25°C)
UNITS
pF
pF
NOTES
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