张小哥

【CW32】CW brushless motor driver

Overview

Use CW32 to design a brushless motor driver board.

The main circuits include 36V to 12V to 5V to 3.3V, three-phase half-bridge drive, back electromotive force collection, Hall signal collection, three-phase current collection, bus voltage collection, potentiometer speed regulation, and CW32 small backboard interface.

The signal output of the driver board is led out by pin headers, which is convenient for connecting to the IO ports of different microcontrollers, such as the STM32 minimum system. Three-phase current collection is mainly used for FOC control.

The maximum input voltage depends on the 2596 chip used and varies from manufacturer to manufacturer. The 2W, 0.05Ω sampling resistor supports a maximum drive current of 6A and outputs an ADC collection voltage of 3.15V.

Other circuits are explained on the schematic.

Due to the lack of buttons, Hall closed-loop driving is temporarily unavailable. Hall open loop, non-inductive open loop, and non-inductive closed loop have all been tested and verified.

It should be noted that the drive signal must correspond to the IO port settings in the program . The CW32-BLDC program is the same as Teacher Li Fang’s routine.

The schematic and PCB files are from the professional version of Litron EDA, and you can use Litron EDA to import the compressed package.

Added SVPWM open-loop control program, the program comes from Bilibili's UP owner "Mr. Xiang, an enthusiastic citizen" .

If you have any questions about the driver board, please add QQ2715833252 to communicate. .

Design Files

All reference designs on this site are sourced from major semiconductor manufacturers or collected online for learning and research. The copyright belongs to the semiconductor manufacturer or the original author. If you believe that the reference design of this site infringes upon your relevant rights and interests, please send us a rights notice. As a neutral platform service provider, we will take measures to delete the relevant content in accordance with relevant laws after receiving the relevant notice from the rights holder. Please send relevant notifications to email: bbs_service@eeworld.com.cn.

It is your responsibility to test the circuit yourself and determine its suitability for you. EEWorld will not be liable for direct, indirect, special, incidental, consequential or punitive damages arising from any cause or anything connected to any reference design used.

Hot

Technical Resources More

Search Datasheet?

Supported by EEWorld Datasheet

Technical Videos More

Forum More

Update:2025-05-14 18:15:09

Request the schematic diagram of the 5-wire DC-DC converter for an electric bicycle
Today I asked the owner of a car repair shop for a broken 48-12V DC_DC converter. The owner was very nice and gave me one for free. When I got back, I saw that it had 5 separate wires. [color=#000][fo
Share: bq27441 Solution to the problem that FC does not set to 1 after being fully charged and left idle for a long time
[i=s] This post was last edited by qwqwqw2088 on 2018-11-9 08:54 [/i] [b][size=4]Problem description: [/size][/b][size=4]1. [/size][font="]bq27441 Solution to FC not setting to 1 after being fully cha
How to deal with the error of differential spacing when checking line spacing in Altium software
In order to minimize the crosstalk problem of single board design, after the PCB design is completed, it is generally necessary to perform a rule check on the line spacing 3W rule. The general process
Does anyone have any papers on PCB design?
[i=s] This post was last edited by paulhyde on 2014-9-15 09:45 [/i] I would like to ask if anyone has any papers on PCB design. I am currently working on a paper but don't know what to do.
Problems with signals and variables in vhdl parity check circuit
In the following program, I personally feel that tmp should be defined as a variable, not a signal, because variable assignment has no delay, while signal assignment has delay. This causes tmp <= tmp
VHDL, I have a question but I don't know how to start, can an expert give me some tips
VHDL, I have a question and I don't know how to start, experts can give me some tips, cycloneII fpga, I am fidgeting :titter:

Datasheet More

Circuits More